The True Cost of Processor Manufacturing: TSMC 7nm

so when you buy a product you're clearly buying it for more than it costs to make it between the cost to make and the purchase price some form of profit but how much do chips actually cost to produce what's your minimum specification so the tale for the story goes back at least a year and a half ago when i promised a retired engineer that i would do this content it's all about how much it costs to create chips and there are two ways to look at this one is going from the cost per wafer and how much money that a company can make for a whole individual wafer all the way down to how much a chip actually costs to produce how much the raw materials are worth and kind of you know working towards the middle now i'm going to start with uh the processors let's have a look at one of you know intel's 9900k processors uh top of the line eight core chip at the time and it went on for retail for 525 dollars and the die size is i've got it written here about uh 180 square millimeters so that chip is being sold for 2.9 per square millimeter it's actually one of intel's higher cost chips actually so with that die size uh if you put these into the die per wafer calculator that we used in the last video you can see that uh if we get 100 yield and a low edge loss ratio then if intel had a whole wafer of these processors they're looking at about 314 processors and if they sold at retail intel would be earning about 164 000 from that processor now let's go to something a little bit bigger let's say uh one of intel's large 28 core sky lake or cascade lake seons you know one like this they're pulling in north of 600 square millimeters and the 8280 l when it was first launched cost over 17 000 for that processor we're looking at when my numbers here say 76 dies per wafer uh selling at nine hundred six dollars means that intel's getting 1.36 million dollars per wafer assuming 100 yield now in terms of cost per millimeter squared we're looking at roughly about 25 dollars per square millimeter i think 25.6 per square millimeter which is pretty insane it's all about amd with its processors something like the uh ryzen 7 4750g it's their zen 2 renoir apu never really had a retail price but we saw it sold for about 323 it's what uh 149 square millimeters this that on the wafer can earn amd about 140 000 which surprisingly enough if you do the same math with navi taking navi uh 21's retail price of 999 amd actually makes about 30 to 40 percent more manufacturing zentu apus than it does navi gpus now don't forget we're talking about cpu versus gpu there for a cpu you have to take the die and package it on a substrate and that's your product packaging testing and packaging is usually about you know 10 to 20 dollars at most for a whole processor with a gpu you're not only buying the silicon you're silicon on the package also buying the board and the power delivery and even the really expensive gddr memory with the processor that's at least all handed over to the motherboard side of the equation so going from that 30 to 40 percent the amd makes more on apus per wafer than it did with navi you know assuming 100 yield then that actually increases when you factor in that board cost now the yield of navi because it's such a larger chip you might imagine is probably lower than that of the renoir apus that difference is going to go heavily more towards apus and it seems to be in a weird position to say that it sounds like amd would make a lot more money manufacturing apus than it would do graphics processors so how does this all come back around to wafer cost now wafers are made of silicon and there are companies that manufacture silicon ingots you do this by having ultra pure silicon that comes from quartz i'm sorry it doesn't actually come from sand maybe i'll do a more detailed video about how to make ingots in the future but you essentially stretch a seed silicon into an ingot and depending on the speed at which you pull it out of the molten silicon that determines you know roughly how big your ingot is and then you polish it and cut it and you get your wafer now these ingots can be hundreds and hundreds of kilos you can get millions of wafers out of a single ingot but the actual cost to buy those just individual plain ready-to-use wafers if you don't it's specialized doped or if you don't want it specialized configuration you can do it in different lattice structures as well the prices i've seen online range anywhere from about 100 to 400 dollars it also depends on how many you buy because they're obviously bulk savings to be had so that's our base raw material cost 400 so now of course the wafer goes to the fab whether that's tsmc in taiwan and intel in the us or israel or ireland the wafer then goes through the system now wafers are generally put together in batches of 25 and they go around the whole industrial complex of a fab in what's called foops front opening unified platform or something or other our wafers are 12 inches in diameter and we have moved 25 of them at a time in a box and it just weighs too much for one person to do repetitive moves so we had to automate it when we talked about the vehicles it's part of our amhs system our automated material handling system it's the transportation vehicle that picks up the product and delivers it to the process tool it takes it from the process tool and delivers it to the next process tool before if the tool's not ready it puts it in a storage unit cool thing number two the automated super highway or as they called here ash automated material handling systems like these are common in our factories those things you see moving on overhead monorail systems are called foops front opening unified pods each foot carries as many as 25 wafers on their journey from blank silicon discs to wafers containing up to hundreds of intel chips arizona's ash 1 and ash ash2 connect all four factories end to end is a distance of one mile every hour about one thousand fruits move through each ash i believe that's actually the minimum order when you want to free a chip a fruit to at least for the high-end process knows because then the idea is that the fruit can land at a machine the machine can process all 25 wafers then the fruit will take the wafers and then either put them in storage or put them to the next machine and we know that modern processes take hundreds and hundreds of steps where they just keep going from machine to machine you've got pre-production you've got production you've got metrology which is testing to make sure that what was printed was accurate and then you know additional maintenance that's even before you get to the substrate the packaging and actually putting it on you know the little green pcb when you interact with a company like tsmc um you'll put in your order there's obviously a minimum order that you have to put in and you know it'll you'll either be a big customer you're ordering tens of thousands of wafers per month or you're a small customer uh doing you know hundreds of wafers per month so big customer kind of like amd apple small customer like cerebrus i guess if you haven't seen my video on cerebus you can click up here and see the biggest processor you'll ever see nobody really knows uh tsmc's process for how it charges companies different amounts the reason for this is on the leading edge tsmc will work with partner companies like amd like apple to help refine the next generation process no technology so for example for n5 apple is the lead customer for the tsmc n5 five nanometer process so there would have been a good amount of collaboration tsmc putting in some money apple putting in some money so overall the wave cost will be you know down but the yields will be lower until the yields get to a good amount right now we're seeing uh yields for n5 and n7 being actually roughly the same at least in terms of defect rate now tsmc also does a lot of the packaging technologies as well they last year announced that you know 3d fabric network array of packaging so you can have hbm you can have interposers you can do their equivalent of emib or foveros they've got a wafer on wafer stacking they've got a special technology that allows them to stack 12 wafers with through silicon vias if they need to i think that's pretty amazing all this comes at a cost exactly what cost will depend on how many but also the priority order i've heard stories that tsmc has you know titanium and gold and silver customers and the higher you are you know the better deals you get but also the higher priority you do there is talk about these contracts never specifying you know dates for delivery of chips but just ranges of dates such that if there's a period of high demand tsmc can sell wafers at a higher cost to a competitor in order to get them in front of yours or they will turn around to you and perhaps say give us a bit more and we'll make sure that you're further up the line tsmc never talk about this so it's hard to verify what is real um and what is you know just people making up stories but suffice to say it's very very complicated and you have to be one of their biggest time partners lots of commitment lots of future no development in order to get the best rates so here are the numbers now i'm going to put the caveat on these numbers because there are always caveats this is from a presentation by dr sophu wilson um in about the 2016-2017 time frame uh she is a fellow at arm she's been working at broadcom for uh a couple of decades at least now i think working on modem technology and um she's a really good speaker i very much encourage you to uh go check out some of her presentations on youtube sit for a couple of hours watching those and they're really detailed about how the first arm designs worked versus you know going from single core to multi-core in the modem space in the uh in the sort of home broadband space of course that she worked on there so it's not a law of course it's the empirical observation and it's been hugely revised over time but the observation goes that the number of transistors on a piece of silicon doubles every two years he originally phrased it differently and it's currently not true intel has been stuck on 14 nanometers for the last five years so we'll look into why that is as the talk goes on seven nanometer there's a little uh asterisk next to the seven nanometer which we'll talk about in a future slide uh which which will come around in about 2020 um and there's a there's a reason why i say it's 2020. if you have 125 watt power limit we have to turn off half the transistors we've got to turn off half the die we still make you pay for those transistors but we're not going to let you use them information this is from tsmc and what what it basically says is as we come down the process geometry size we obligingly get more and more uh gates per square millimeter um you know down to seven nanometer or you get 17 million gates per square millimeter so one square millimeter 17 million gates or as i like to think of it three fire paths we have difficulty packing them together so you can see the gate utilization has fallen this is because the rules we have to obey to get the thing manufactured are so much harsher so the used gates aren't scaling as rapidly and we can also see the cost per gate it fell to a minimum in 28 and is beginning to rise again that's really bad but she presented this table about how much wafer costs were at the time then now this is a lot of information but the key metric here i think is the cost per wafer now this shows wafers from 90 nanometer all the way down to seven nanometer now at the time seven nanometer was a future process node technology but tsmc was still taking orders now if we look at the results it's you know 90 nanometers you're looking at 1300 per wafer now those wafers are obviously cheaper they're eight inch wafers not 12 inch wafers the 400 i gave you before was for a 12 inch wafer so eight inch wafers are probably you know 100 or less but then you know it goes up in price we've got 65 nanometer at 1585 40 nanometer at 1900 all the way up to you know 14 16 14 nanometer at four thousand dollars and then finally seven nanometer at fifty eight hundred dollars so that's very different from what a lot of people have been saying online and i think that's due in part to how competitive tsmc's seven nanometer node has been because there's been such a high demand for it tsmc are quite happy to put up the prices if people are to pay for it i've seen price estimates anywhere from say seven thousand dollars to fourteen thousand dollars per wafer bearing in mind that the raw material cost is probably four hundred dollars or less so what does that exactly mean for the companies that are buying the chips uh what they do is you know they pay for the masks they pay for all the little um steps that need to be done and the masks those steps and they hand them to tsmc actually i think tsmc has some of that in-house tsmc uses those in a manufacturing process and then charges you know say six thousand dollars away for seven nanometer and then that uh wafer goes either to packaging at tsmc's packaging technologies or at uh other different osats other companies might use so if we're just looking at the pure wafer cost add in some extra for packaging let's put aside r d for a second and let's just say six thousand dollars per wafer amd with its uh renoir zen 2 apus they create about 400 of those per wafer and if we assume 100 yield and about a 323 dollars selling price that wave has the potential for to earn a hundred and thirty thousand dollars there's a hundred and thirty thousand dollars of chips for six thousand dollar cost in terms of actually production and packaging this is a you know a ratio of what 21 and a half which given the markups that these industries have to do you kind of think well yeah that's why you know semiconductors are profitable now 21 and a half seems quite a lot if you look at the gross margins for some of these companies uh amd's are what 46 intel's in the mid 50s low 60s usually so even though you know there's a factor of 21 here or say for i've got the numbers for big navies about 17. there's a lot of other stuff that goes on uh marketing shipping um beyond packaging actually working with partners to co-develop systems that sort of thing it helps that semiconductors can be sold for so much but then it you know also looking at how much it costs to build a fab you've got a look at say tsmc's financials and see just how many wafers they're putting through and what that makes for revenue i think at last count tsmc was producing the equivalent of 3.3 million wafers per quarter or about 1 million wafers per month in those numbers actually tsmc is uh 49 leading edge so that's 7 nanometer and uh five nanometer and then anything above that is no longer called leading edge and that's still 51 of the revenue at the minute tsmc's making about 160 000 wafers on leading edge and that's contributing 49 revenue the other 51 of revenue is uh about 800 000 wafers equivalent 12 inch wafers so one potato question to ask is who makes the most money per wafer when they buy from tsmc i'm going to say that is currently cerebros so cerebros's wafer scale chip 46 000 square millimeters they get 100 yield anyway because their architecture is built to go around defects one of these wafers gets about 40 to 45 defects per wafer and they've found a way to build around that with their chip they sell one of those chips in a 15u system for about two two and a half million now that's 16 nanometer the seven nanometer version costs probably about twice as much so for a wafer that costs six thousand dollars adding the packaging they're using really special packaging so no doubt the cost is perhaps doubled than that so even 12 000 they're selling a full rack system for two two and a half million for a chip that's costing about say even if we're liberal you know 15 20 000 to make that's an insane markup but obviously they're doing very small runs of processors there so my main association is i would like to see these companies actually produce numbers about how much their wafers are being sold for now that will never happen i'm really surprised that this slide was shown at a presentation uh even you know pre-seven nanometers so it's a little bit old at this point but i still think it's entirely relevant it gets more complicated with chiplets because you've got stuff coming from tsmc and stuff coming from global foundries and then you've gotta put it together and you're shipping from different parts of the world for your packaging and your testing this will only ever get more complicated as we move forward if you watch the end there'll be a cat tax but in the meantime if you like the video please give a like and a subscribe if you don't please let me know in the comments what you'd like to see change but as always what's your minimum specification you

Channel: TechTechPotato

Views: 218,707

Rating: 4.8915639 out of 5

Keywords: tsmc 7nm, amd 7nm, tsmc wafer, amd wafer, tsmc cost, 7nm cost, tsmc wafer cost, amd wafer cost, tsmc yield, tsmc n7, tsmc n5, chip, chip cost, processor cost, wafer cost, wafer 7nm, semiconductor cost, semiconductor shortage, semiconductor 7nm, samsung 7nm, intel 7nm, globalfoundries 7nm, intel wafer cost, samsung wafer cost, qualcomm chip cost, cost of silicon, silicon ingot, techtechpotato, ian, cutress, sophie wilson, sophie wilson arm, packaging, chip shortage

Id: tvVobTtgss0

Length: 18min 51sec (1131 seconds)

Published: Sat May 01 2021

Reddit Comments

[u/bubblesort33]

Profit margins on big Navi must be abysmal per die compared to something like a 5950x. 2x 80mm2 (7nm) + 125mm2 (12nm) IO die. It's far far easier to make and yield than a single 520mm2 6900XT die. I'm sure they are still making bank, but they could sell three $800 CPUs instead of a GPU if they moved all the effort away from GPUs. And I'd guess AIBs are paying only $500 for the actual 6900XT die itself.

[u/bubblesort33]

Is the Wafer Cost metric what it would cost currently? Or what it would cost at the time of release of the process? Would a 28nm order cost $2361 today per wafer, or in 2011?

[u/Kougar]

Given the dark silicon issue, how much can chip redundancy against defects offset this? Since additional redundant circuits/cores/etc wouldn't be used unless needed, wouldn't that mitigate some of the dark silicon requirements for a time? If true, that would seem to indicate there's extra financial incentive to build some amount of additional redundancy into the chips rather than simply leave the dark silicon "empty".

[u/KKMX]

"true cost"? don't think so.

The numbers shown in the video are identical to IBS outdated wafer pricing estimate from a few years ago. Even the cost per 100M gates and the other columns are identical. It's unfortunate Sophie Wilson didn't cite her source but that's where it came from. IBS updated their 7nm pricing to over 2x their earlier prediction. I can't share the actual report but google images has some more recent stuff:

• https://www.google.com/search?q=IBS+wafer+cost&tbm=isch&source=hp

• https://sst.semiconductor-digest.com/2016/09/moores-law-did-indeed-stop-at-28nm/

[u/lazy2late]

i have tried posting this but it was removed, is it recommend by anandtech in the video above

https://www.youtube.com/watch?v=R2SdSLCMKEA

Dr Sophie Wilson, an alumna of the department. She co-designed, with her colleague Steve Furber, the BBC Microcomputer, BBC BASIC and the Acorn Assembler

[u/Blueberry035]

The 50 percent gross margin he mentions for intel is kind of meaningless.

Gross margin means nothing as it's a number you get after the revenue passes through creative bookkeeping and countless shell company 'contractors', and what's left after that is mostly reinvested into more assets and investments (through yet more shell companies) in order to avoid paying taxes.

Only then do you end up with that gross margin number

​

The whole process from concept on a post it note to final product on the shelf can cost a tenth of the final retail price, yet there will NEVER be a 90 percent gross margin in the books.

​

There isn't a shadow of a doubt that amd and intel make enormous profits on their hardware

[u/campmkting]

For AMD, Intel, Nvidia design production cost : price / margin see my Seeking Alpha comment and blog spot. Currently TSMC 7nm design production for consumer size chips that are not XCC Xeon = 10 cents per mm^2 + mark up to the customer. Intel 12 nm RL = 10.5 cents per mm^2 + variable cost of production. Samsung Ampere = 12 cents per mm^2 + mark up to the customer. My early Intel 10 nm Xeon assessment vis-a-vis fully depreciated process Cascade Lake r suggests Ice lake Xeon is double cost of CLr. I have not calculated Tiger Lake yet.

All ball park bottom up cost : price assessment from cost per mm^2 can be calculated at marginal cost = marginal revenue = price to the foundry customer. Same for design producer to OEM and same for OEM to distribution sales. This is not set in stone but offers an easy bottom up tool. Otherwise cost can be broken out of price on total revenue total cost analysis knowing change in component production volume and change in average weighed price through time on grade SKU split. mb

[u/lgdamefanstraight]

maybe amd should just make bigger apus(4c4t, 4c8t), instead of making low margin entry level gpus