How SERDES works in an FPGA, high speed serial TX/RX for beginners

for this video I'm gonna be talking about sir DS in an FPGA some people call it sir des thirties it stands for serializer deserialize ER and it's a main component used in a lot of FPGAs it's a little bit more of an advanced topic so I'm gonna give you some background about serial data to communication parallel data communication the differences between the two and this is all for Wired communication not Wireless this is Wireless is something totally separate so but you might have seen an fpga datasheet that looks something like this this is like a vertex 7 from Xilinx and they call out something here transceivers there's three different types of transceivers and then in parenthesis they have a max rate usually measured in gigabits per second so I've outlined that here in this red box and if you've seen this before you and you've never needed to use a series transceiver you might be wondering what these are for and I'm gonna go into detail about exactly what these transceivers or surtees blocks do for you inside of an FPGA as you can see they're pretty common on some of the higher-end FPGA is a lot of there's a lot of them like 30-something transceivers that you know pretty fast frequencies so Before we jump into the sturdiest transceivers I'm gonna give you a little bit of background about more generally parallel and serial data so let's see on the left side we have an LP T cable this is an old printer cable this is a parallel style community of communication PCI like might be found in your motherboard that is a parallel interface these are more of the old interfaces for communication and people have really switched to serial serial communication more recently for example USB Universal Serial bus HDMI is a serial communication your lightning cable is serial serial is the present and future of high-speed communication interfaces and I'll go into the details of what so I think it's an important background to have when you're when you're using an FPGA with Sergi's transceivers on them why do you need them in the first place so a quick overview of parallel so parallel has many pins it's limited at speed and therefore usually limited in bandwidth it's past and it is still using the present because it's so simple if you don't have large bandwidth needs parallel works fine for a lot of applications not all applications but many and this is what it looks like from a transmitter and receiver transmitter goes out the transmitter and the receiver the channel is just the wires in you know one wire for every line of data you want to send and it's pretty straightforward contrary to that there is serial based communication usually has less pins but it's much faster so higher bandwidth applications you know your HDMI s and things like that with your high data rates and it is the the present and future for high-speed bandwidth needs one downside to serial is that generally uses more power than a parallel interface but you get more data so a bit of a trade-off there and it is complicated for sure it is complicated and we're going to go through that I'm gonna demystify it for you and hopefully make it a little less complicated but just to show you briefly you know transmitter now looks complicated there's there's a PLL phase lock loop as a serializer an output stage your channel looks different your receiver is different to as a CDR block we're going to talk about these things but it's still fundamentally it's still data in on the transmitter you know the for data in lines and the for data at lines on the receiver so you're still sending and receiving data but how you get that data to go through your channel is different and we'll demystify it let's jump in a little bit so first of all a little background on parallel data you're probably familiar with this there is something called the clock that goes between zero and one there is something called data and when there is an edge on your clock you use that edge to sample your data line and that's that's how you get your your data across the synchronous interface or clocked interface parallel interface you can add more data lines to get more bandwidth but you know I squared C for example which is a picture this is what this is it's just one clock one data and it's pretty straightforward easy right so there's two ways you can send more data with parallel let's say you have high bandwidth needs and you want to send more data across your across an interface so you can take a single PCI connector maybe you can add a bunch more and have more parallel paths in your design and send more data that way the other thing you can do is you can crank up the clock speed but this falls apart pretty quickly and let's talk about why that is so the fundamental problem of parallel interfaces is something called clock skew and basically what it means is as your clock speed increases skew is that skew becomes a big problem so you know we're dealing with really fast data rates here in the gigabits per second gigahertz right we saw it series transceivers on the first page over 12 gigahertz gigabits per second and yeah there's a rule of thumb that's wire that electricity travels down a wire around like 1 foot of wire in one nanosecond which if you have a 1 gigahertz data rate one nanosecond is the period of a bit so that means that every foot has a new bit on it HDMI runs at 12 gigahertz so now every inch has a new bit so if you imagine an HDMI cable it's a foot long you can have 12 bits on that cable all at the same time and what ends up falling apart here is that the edges of your clock and synchronizing all those those pieces of those parallel data interfaces together becomes impossible even if your wires are a little bit one wire it's a little bit longer than its neighbor then data arrives at different times at your receiver and when that happens you you you know you're fighting you're really fighting physics at the wire level I guess if you're cutting a wire and you've accidentally cut it a few millimeters too short you might lose your data and controlling that for like you know six dollar Amazon HDMI cable is like impossible you know you can control it on a PCB by laying out exactly the right length traces on a PCB but when you when you go into a cable interface it falls apart and just in general matching matching all the properties of transmitter and receiver electrically is really challenging so take it for granted that clock skew just completely falls apart for parallel interfaces so we need to do something different for sending data faster and what we do is we something called serial and the main thing about serial is that we embed the clock in the data so now instead of having a clock and the data you combine them together somehow and you have them in just one you send them together at the same time this is fundamental so what happens on the transmitter side is the transmitter will encode the clock immitating together you have to come up with some encoding scheme and we're going to talk about a few options for that and the receiver needs to know what this receiver and transmitter both use the same encoding and decoding scheme and then the receiver will extract the clock in the data so the clock in medida is still needed on the receiving side but the receiver will kind of extract the clock and data on its own which is pretty cool you still need the clock to sample your data line to know when when to sample the data line but the receiver itself can get its own clock which is kind of cool so three things to talk about when it comes to surveys and high-speed serial communication the encoding scheme itself to include to take your clock and your data and encode them into just one one data path and the channel itself so how does the the cable work and what does it look like from a wiring perspective and then also the input and output stages of in this case would be an FPGA what are those do what's special about those so let's talk about the clock encoding scheme so you can take a couple things about clock encoding you need to guarantee data transitions along a long set of zeros and ones needs some transitions so you can imagine if you want to send like 128 bits of all zeros you're gonna eventually lose your receivers not gonna know when to sample the data so you're gonna have to introduce some transitions into even long data streams you have to introduce transitions so that your receiver can know like okay there's an edge I'm going to resynchronize to that new edge now and if those are too far apart if also it doesn't work so here's an example something called Manchester encoding tick clock you take data you can create a Manchester encoded version and this contains information to extract both clock and data this is pretty simple and it's a little it's older not just not super common these days hdl-c uses its own clock encoding scheme but eight B 10 B is by far the most popular and we're gonna talk in detail about that because it's kind of cool all right eight B 10 B encoding a p10 B encoding takes 8 bits of data so I'll bite and converts it to 10 bits of data which is an immediate hit to your total bandwidth right off the top because now you need to send two extra bits to get 8 you know you send 10 bits to get 8 bits but it's totally worth it a long run and the reason why it's worth it it's because it guarantees a few things one it guarantees let me call the DC balance of your line so DC is direct current so basically the voltage at which your your channel is sitting at is guaranteed to be DC balanced so if you imagine you send a long term of you know if you have a HDMI cable it's a foot long and you send 12 1s in a row that's going to bias your HDMI cable to like some positive voltage it's going to it's going to like charge up the actual wires that are on your cable and you really want to maintain and then let's say let's say you're charged up to like the rail of a voltage on your cable and then you want to switch and go the other directions you want to send a zero now and that there's actually so much bias to the it's go you know it's DC biased it's upward to whatever voltage you've been sending if you want to pull it back downward again it's harder to do that so you really want to maintain a DC balance of your of the data that you're setting so for every one there's a zero for every zero this one and then that's that's DC balance now the second thing I did mention this before but you want to guarantee that you have some transitions on your on your data so if you have just a long stream of zeros or ones you're not going to have the ability to do clock data recovery or CDR on your receiver your receiver is going to like wait for a transition and eventually it's going to lose what's called lock which is the PLL your PLL and the receiver side is just going to lose move the lock and be unable to recover the data at that point so even if you're sending a long stream of zeros or ones there's always transitions occurring an 8 B 10 B guarantees that by the encoding standard this is a super common interface encoding scheme let's use on DVI displayed port Ethernet firewire HDMI PCI Express SATA and USB and I'm sure you've heard of at least a few of those so it's very common although you may never have heard of it now if you're implementing a series transceiver and an FPGA or you're probably going to be dealing with VP encoding on your transmitter NAB a p10 be decoding on your receiver next plaything channel optimization so this is the actual cable itself how do you optimize that to be this whole thing you know also sending data fast is all about fine tuning every single piece long-play so now we're talking about the cable itself how do you make that really really great this key thing is the most important thing I think is seeing a single anniversary's differential data transmission all pretty much all fast data transmissions are differential versus single I did so single ended is your transmitter on the left to receiver on the right your single ended means that your transmitter and receiver have a common ground and just one data path and they send you know a 1 is 3.3 volts and a zero is zero volts and your receiver can compare the ground to the new data coming in and know what the value is of that particular data that works pretty good for you know short runs it works pretty good for slow data rates but if you need to send data over a long run over or at fast data rates you need to use differential which is requiring two wires so you've taken a hit on the number of wires but it's way better from like a signal integrity perspective I can talk about this on its own but from a single Tegrity perspective differential is much better and from speed you can get much faster speed so um LVDS is a very common differential standard low voltage differential signaling and it's just taking you know instead a one is one wire going positive the other wire going negative and a zero is you switch the two so you're always in some the two wires are always opposite each other from the voltage perspective and that is just better to take it for granted that it is better one extra pin but the trade-off is is totally worth it come so that's one thing difference always then your data is always some differential and the again the quality of the channel is very important you know you're you're sending data at such high data rates that you're what you assume you know electronics class is like a zero zero ohm impedance cable there actually is some resistance there there is some capacitance to get to copper it's small but if you're sending data at a really fast data rate you know you still have these voltage you imagine a clock is like instantly go from zero to one but in fact there is some rise time associated with that and that's really the time it takes like charge your wires up and so the faster you can the faster you need to go the more that this becomes a big deal so one quality measurement that is used is something called an inter symbol interference diagram or an eye chart looks like it's called an eye chart because it literally looks like an eye if you look at the picture and the more open you can get that I to be the better that means that you're less likely to have bit errors in your in your data ready in your channel at faster and faster data rates so open eye is better you can you can get you can generate these plots by using very expensive oscilloscope and generate your own eye charts which is kind of fun to do and the last thing to mention is there like I said there's tricks on the FPGA itself inside the FPGA fabric these are why these blocks are like transceiver blocks they're pieces of hard hard silicon built into the to the FPGA you can't just instantiate one they're built in and one they do some tricks they do something like for example pre-emphasis and post emphasis where they actually instead of sending point three or point 7 volts I forgot LVDS is point seven point three whatever point four hmm anyway instead of sending like a voltage and having that be a 1 they actually drive a little bit above that voltage for a small amount of time and then come back down again so it's actually kind of cheating in a way but it does help those help things it helps you help those those charged up times where you're charging the wire and you're going from a zero to a one you get there faster if you over by us if you overdrive the line for a small amount of time and that's what pre-emphasis is really doing you're over driving your line and then coming back down again to kind of charge it up get get that data to push through and really transition as quickly as possible change dates and super fast this is all about just eking out as much performance as you can from your copper your FPGA and just cranking up the bandwidth and getting data through that interface as fast as possible so FPGA is why our FPGA is like good at this right why why is this a common use case well if PJ's are fast you can run your internal clocks at very high frequencies and ship this data in and out of an FPGA no problem and a lot of them have these built-in surtees blocks serialization deserialization blocks so you can just instantiate a lot of different you know inputs and outputs to an FPGA and MUX data or send it to from from this transmitter to that one and do all sorts of cool stuff and there's many many different applications depending on the industry so radar applications for like defense industry and there's networking applications shipping packets around things like that tons of camera applications so any high speed video interfaces all user these blocks so this is extremely common use case for FPGAs again a lot of high-end FPGAs have many sir these blocks just for this reason I hope that was informative hope that gave you a good background on sir DS and why it's useful in an FPGA if you enjoy this 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Channel: nandland

Views: 16,261

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Id: 3xZsTBEUkFI

Length: 17min 15sec (1035 seconds)

Published: Wed May 27 2020