Research Directions in RF & High-Speed Design

greetings i am bazar zavi and today i would like to talk about research directions in analog and high-speed design and in particular give you some examples of what my students in my lab have been doing so i will begin with some introductory remarks and go over some examples of both wireless communication circuits and wire line communication circuits to see what challenges we face and what interesting ideas we can incorporate then i'll briefly talk about the terahertz challenge which is yet another interesting field for research and then i will summarize with a conclusion uh people entering the field of circuits often ask two questions question number one haven't circuits been around for a very long time sure here's an example of a simple multivibrator circuit using vacuum tubes that goes back to 1919. so yes circuits have been under development for 100 years so naturally the second question which is a misconception is the following haven't we invented any circuit that could be invented and the answer is absolutely not uh every year the people introduce new circuits new ideas and why is that well this is because they're trying to respond to challenges that arise from new applications every application has demands along several dimensions for example power consumption speed accuracy etc and to respond to these challenges we have to come up with new ideas so as we'll see throughout this talk there are so many new ideas that we can propose for any of these fields to improve the performance and demonstrate something that other people have not been able to okay so we talk about research so let me just define what i mean by research so research is uh solving a real difficult problem by an elegant and innovative method all of these four adjectives that i have highlighted here are important the problem has to be real not something that'll be made up a problem that the industry faces today or tomorrow it has to be difficult so difficult that the present solutions cannot solve it and we need some new method and the solution that we propose needs to be elegant means to be nice and simple and we'll talk about that shortly and of course it has to be novel and that's how students get their phds now a fundamental principle that i impress upon my students is that simple is beautiful so we want to see solutions that are simple and yet novel and that's what makes it interesting how do we know if an idea is beautiful well this idea is beautiful if it elicits a reaction from the people as follows they say how come we didn't think of this idea before okay so it's simple enough and yet not obvious and that's what makes it novel of course in order to make an idea beautiful the solution beautiful we have to work hard because making things beautiful is not that simple and that's where most of the work comes into picture most of the work that a phd student carries out for several years because we're trying to create something beautiful something elegant but it's not simple so we start out with some solution it might be too complicated we look at it again we look at it from different angles until we come up with something that at the end is beautiful and simple okay the second misconception that people enter in the field have is the following they say haven't moore's largest and end so there's nothing else to do in the area for example cmos design because the technology has stopped scaling well that's not entirely true first let's start with this plots from this paper in isis 18 where they say the number of transistors as a function of time is probably increasing this is like up to 20 20. so that part is okay but then they say the clock speed seems to be saturating here's the clock speed saturating around a few gigahertz now uh that is interesting and that's sort of the disappointing result that you might perceive here but what clock speed are they referring to in this paper exactly well they are referring to the clock speed of only microprocessors yes microprocessors have reached a few gigahertz of speed and beyond that it doesn't make much sense to increase their clock frequency they go to multiple cores but that is not to say that the clock frequency has reached this saturated level in all the other applications of microelectronics in fact microprocessors now constitute by the small fraction of this entire industry so there are many examples that go far beyond a few gigahertz so here are a couple of examples in this paper from ibm they developed a 112 gigabit per second transmitter for a data servers for uh for data centers i will talk about that a little more or here we have a 28 gigahertz 5g transceiver for radio and wireless applications from qualcomm so obviously we're going to very high frequencies and these are people from industries so they know the real applications that these circuits can have so the notion that the clock frequency has saturated is not applicable to many other circuits and as you'll see today we push through we push to high frequencies all of the time for many different applications okay so the applications include wireless and wireless communications automotive electronics bio medical systems and many others that i won't have time to touch upon today but there is plenty of room for research and for new ideas okay so let's start with quiz number one just to get warmed up which one of these objects has not used wireless technology so here are the objects we have the light bulb the toothbrush the pacifier and the shoes so what is your guess which one of these has not used wireless technology what are you well your guess is probably incorrect because all of them have and probably the most interesting is this pacifier and why would you want to have wireless technology in the pacifier well it turns out that if we analyze the baby is a saliva from that we can detect certain diseases so if we have some sensors in here that can analyze the saliva and provide some information and that information can be transmitted wirelessly then we can find something about the baby even while the baby is asleep or anything else so all of these have interesting applications now quiz number two here's a watch from 1975. you are probably too young to remember this and here's the watch from today okay so how long does this watch run when this battery is charged and how long does this run this battery would run this watch would run on one battery for one year this one runs on one day so what happened after so many years of development we have not been able to keep up with this uh amount of battery lifetime well obviously because this is just a simple watch whereas this is a much more powerful device today but as you can see this is a problem and we need to lower the power consumption of this watch and this terminus that connects us to the rest of the world and in fact if this watch is to have all sorts of wireless capabilities such as cellular systems and wi-fi etc then we also need to look for a low power solution that satisfies all of these different standards and frequency bands so we're going to talk about this now okay so we'll talk about the universal radio challenge this is mean this means we want to design a receiver that can accommodate all of these bands that we are familiar with and are in use today for example we have wi-fi we have cellular bands such as gsm and wideband cdma et cetera and these span about 800 megahertz to six gigahertz so as you know a wireless receiver takes a modulated signal that's some carrier frequency from the antenna passes through some sort of amplifier and then down converts it meaning shifts the center frequency to zero and this is where we have our our original data and information whether it's voice or an image etc okay so if we are designing a universal receiver that can accommodate all of these different bands and standards here are the challenges that we face number one we have to operate from 800 meters to 60 gigahertz so one receiver has to be able to do all of this so tuned circuits are difficult to use in this situation because they have a narrow bandwidth then we also have to provide enough linearity and bandwidth for for example wi-fi channels which may have as much as 160 megahertz of bandwidth and run with complex modulation such as 1024 qualm and these are tough specifications that that receiver has to meet in addition for cellular applications the receiver must be able to withstand large interferers interfering components for example up to zero dbm this is 632 millivolts peak to peak right here and we have to be able to withstand these and yet receive a desired signal and finally we must be able to reject blockers at harmonics of the low frequency there's a local oscillator here that drives the sound converter and this down conversion inevitably mixes the signal with the harmonics of the yellow as well so if we have interfering components here whose frequency happens to be equal to the harmonics of the lo they also down convert and fall on top of the desired signal and that's of course is extremely bad so we have to see how we can reject those so in a sense we are we are taking the greatest challenges in all of these bands and standards and uh trying to meet all of them in one receiver and that's what makes what makes it interesting okay so we're going to start with a very simple chain of blocks first as would be obvious in designing a receiver uh this is a paper uh published by my student jose rosavi and myself in vietnam's vlsi circuit symposium and you can see that we have some gain stages this which represents a mixer so it down converts the signal and then we have some baseband gain stages very simple all right so the first question we have to answer is how do we make sure that we limit the bandwidth of the signal arriving here to the desired channel bandwidth that would be 200 kilohertz in gsm all the way up to 160 megahertz in wi-fi so we want to have channel selection for that we're going to apply a simple low-pass filter as shown here around this gm stage so that gives us some channel selection ability that's easy that's pretty well known not a big deal okay in the next step we have to ask how do we meet the linearity for wi-fi so linearity in this situation is concerned with two effects one is that we have a large interference signal so that interference signal must not create non-linearity as it goes through this chain and number two even in the absence of this interference for the desired signal when we have these complex modulations such as 1024 quantum these stages have have to be linear so that they don't distort the desired signal so from both perspectives we need enough linearity in this chain well one possibility is to reduce the gain of these stages so that the signal that's arriving here and the blocker interfered arriving here are small when the voltage swings are small the circuits tend to be more linear that's great but then the issue in that situation is that uh if the gain of these two small the noise of these stages referred to the input will be too large so we have a simple trade-off between linearity and the noise of this receiver the noise figure so how do we avoid that well in this paper we introduce the notion of multiple feedback techniques so we have these feedback paths coming this way and with these feedback paths what we can do is reduce the voltage swings at these nodes and yet maintain the same noise figure as if you had just high gain stages here so we relax the trade-off between linearity and noise figure so we can improve the linearity and not sacrifice noise performance okay the next issue is blocker tolerance in this situation we are referring to for example cellular applications where we have a very large blocker coming in it could be near the edge of the band it could be as large as zero dbm very large and the problem with zero dbm is that even though now we have linearized this receiver this linear is not sufficient for a zero dbm blocker coming in so we need additional techniques and for that we introduce these end path filters around the first two stages okay the next issue is stability how do we know that all these feedback loops together are actually stable so we have to analyze it we start with the innermost loop and we make our way out to the outer loops and what we see is that actually the circle is not quite stable meaning that its frequency response is not flat so to flatten the response we add one more bank of end path filters here and that turns out to give us a nice flat response okay finally we have to worry about harmonic blockers harmonic blockers are interferers whose frequency happens to be equal to a harmonic of the low frequency that drives these mixers so there are many well-known techniques for these but we started thinking a little differently about the problem we said okay can we somehow suppress these blockers as they come in here even before they enter the receiver that would be great because then the amount of rejection that we need in the following stages will be relaxed so how do we do that well we thought maybe if we can add some sort of trap here that shorts the harmonic blocker to ground meaning it reduces power before it enters the receiver if we do this successfully then why not add one more here and one more here so we have these three traps that reduce the effect of these harmonic blockers before they enter the rest of the system okay so as you can see there's a lot of stuff going on here i'll just give you a few circuit highlights just to give you a feel for the new circuit ideas that we continue to produce everyone continues to produce in the area of integrated circuits so here's an example related to the harmonic trap idea so remember that we said we want the desired signal to propagate this way we want the harmonic blockers to flow to ground and be shorted out so to speak so how do we do that well let's focus on this harmonic trap and see what impedance it must present to the antenna well what we are hoping is the following we are hoping that this presents a a a high impedance at the desired frequency and a low impedance at the harmonic frequency right we wanted to do it short so we configure this as shown here by an amplifier and a feedback capacitor we just use miller effect right so the idea here is that if the gain of this amplifier is a low at the desired frequency then this capacitor is not miller multiplied much so the impedance looking down here is a high because the capacitance is small on the other hand at the harmonic frequency this has a high gain that means that this capacitor is multiple of a large value that means this input capacitance is large which means the input impedance is low and we can short the harmonic blocker to ground all right so that's one idea that's used here and here etc of course there are some interesting questions that you may raise for example as i change my input frequency and my low frequency how do i make sure that this characteristic also tracks these frequencies so that's based on some end path filters built within this hms and also some interesting things that you can read in the paper okay one more idea in the baseband we have these op-amps and the bandwidth of these op-amps is actually critical because we have to be able to handle the 160 megahertz wi-fi channels and for that we introduced this new op-amp topology here we can see that the basic structure is just m1 and m2 a diff pair driving these current sources but then we add a cross couple pair here to raise the dc gain and we have some negative miller capacitances here to improve the bandwidth so my point in all of this is that there is need for new circuits and we continue to produce new circuits okay let's switch gears to the transmit side of a wireless system for transmitters there has been a trend towards mostly digital transmitter design and what that means is that we want to perform all of the operations in the digital domain and then just before we reach the antenna we convert the digital information to analog by means of a d2a converter attack and then the dac directly drives the antenna so all the power that we need is produced by the dax and nothing else the advantage of this approach is that all the analog functions that we had here are removed so the overall result is simpler and more robust and the only linear port in the circuit is here right this is where we have an analog signal so at this point we have to have some linearity but before that we don't and that's a clear distinction between this approach and the analog approach okay so in this paper for example they introduce something like this for wi-fi applications at 2.4 gigahertz they deliver about 19 dbm of power with 17 efficiency so when we set out we said okay how can we go up to 250 milliwatts this is for cellular applications and then reach a 50 efficiency what does it take to go there okay well so of course the dax have to be able to deliver that much power but the linearity of the dax becomes a problem all right so as you know a system is non-linear if the characteristic has a non-constant slope right the slope depends on the input of the output and this is a problem that we face in power amplifiers and d2a converters and pretty much any other circuit so we would like to avoid this nonlinearity and what happens is that for power amplifiers we also have a trade-off between efficiency and non-linearity meaning that if we limit the signal swing to this linear region then the efficiency of the power amplifier drops so here's the situation we want to have more linearity the efficiency drops so we want to see how we can ease the trade-off between linearity and efficiency in a d2a converter now the problem is that the linearity of d2a converters and power amplifiers depends on a bunch of factors for example it depends on the temperature so as the chip warms up or cools down as the cell phone tells the power amp or the d2a to deliver more power less power the temperature changes and the linearity also changes similarly if you hold your phone and you wrap your hand around the phone the impedance of the antenna changes this impedance changes because of the proximity to the hand when this impedance changes the linearity of the circuit also changes and finally the linearity of circuit is time dependent it has dynamic nonlinearities that affect the results based on the previous history of the data so from all these perspectives we prefer to correct the non-linearity of that circuit in real time and that's what we call that's what we call background correction or background calibration so in other words we just don't want to do a one-time calibration at the power up and then let the circuit go because we know that the nonlinearity will change over time or temperature et cetera okay so with these now let's see exactly how we're going to do that okay so we start with a very simple situation here's our d2a it has a certain input output characteristic denoted by this f for now we assume a simple static nonlinearity so this can be thought of as like a polynomial expression and we have a non-linear behavior from x to y so what i'm thinking is can i precede this block with another block that cancels this non-linearity aqua this is well known the idea of pre-distortion this is what you might call pre-distortion but the problem is that pre-distortion does not lend itself to real time or background correction so let's think about this more fundamentally here's what what happens the baseband signal is coming in we call it w the output rf signal is here y uh and we call that f of x this x and ultimately what we would like to do is make sure that this signal from the basement and this signal from the rf are good copies of each other of course one is that one is that rf one is that baseband but the information should be the same if the linearity of this chain is very good okay so what i would like to do is make sure that f of x minus w is close to zero right that's what i'm hoping all right so i can recast the problem as follows i can say that uh this x must be chosen for any value of w such that f of x is close to w all right so i repeat for any value of the baseband input i would like to choose x such that f of x minus w is zero or close to zero okay we're going to call this difference just something g of x called the error function and what this means is that we're trying to find x every time so that x makes this difference 0 right so what does this mean i have a function equal to 0 i'm trying to find x well that means we're trying to find the root of the function right the root of g of x the root of this and we know that the w is known because it's coming from the input and f is known so we're just trying to solve this equation by finding the right value of x so what the system should do is for every value of w you should find the root of this function and put it right here so this circuit has to produce that root okay so let's go back to fundamentals in numerical methods we know how to approximate the root of a function there are different methods one is newton-raphson which you might have seen in your first year second year classes newton-raphson says that if you're trying to solve the function find the root of a function what we do is we make a guess and the next guess for that root is given by the previous guess minus the derivative of the function and minus the function itself divided by the derivative of the function right so that's how we find the next value so then it should be easy right so what we do is we make a guess and we find this fraction is subtracted that gives us the next guess then we put it here repeat this and this converges hopefully towards a final value for x that would be the root of this function now at this point it seems a little abstract i have some sort of circuit here i have some sort of algorithm here from newton-raphson and how do i implement this here okay but it turns out to be actually very simple all right so here's how it goes we start with this equation and uh we will make a very simple simple and coarse approximation this is a special case we're going to assume that the derivative is 1. that sounds strange right how could the derivative of this function be 1 it's not but we're making a very simple approximation so if that's the case then i can say that the next value is equal to the previous value minus g of x and what is g of x remember g of x is just the difference between the output and the input so that comes out to be the present value of the of x plus the present value of the input the baseband signal minus f of x all right now i can build this in circuits so let's see how that works okay here's how it goes i have my baseband input here and i have f of x at the output right that was the output right so i bring f of x this way i have to subtract it from the baseband according to this equation and then i have to add it to the previous value of x so the previous value of x is here i have to add it like so but how do i create this time delay this is the previous value this is the next value so i just need a one clock delay here which is a z minus one block all right so this circuit implements this idea in other words it updates the value of x according to this simplified newton-raphson technique so that the difference between f of x and the input approaches zero so that's beautiful isn't it in fact if you look at the circuit in the dash box you might recognize this as an integrator in the digital domain analog domain however you want to think about it so that's an integrator and now i have a feedback loop with an integrator in the forward path what do we call this we actually call this a delta sigma modulator so it makes sense what we have done is we have placed the transmitter in a delta sigma modulator loop so that it has a very high gain at low frequencies and because of the high loop gain it makes sure that this and this are close to each other like any other negative feedback system which means the output is a good replica of the input even though the circuit has non-linearity so this gives us a whole bunch of advantages so first of all we can correct it non-linearity we can correct it in real time this is running all the time right we can also take care of temperature variations etc we don't need any lookup tables or fir filters any other complications that you might see in prior work and finally it doesn't need any adaptation because it's running all the time so my students contribution here in this little simple circuit is number one to recognize that delta sigma modulation is actually a simplified case of the newton-raphson technique so that's very interesting and the second is that if we place this transmitter in a delta sigma modulator loop we can improve its linearity now this approximation need not be true right we can try to make this approximation better so if you read this paper you'll see that my student actually goes and finds a better approximation for g prime and improves the performance etc all right one more point is that this signal is analog the signal is digital so we need an a2d here and this a2d presents its own challenges because it has to provide a high resolution and run at relatively high speeds so how to design this a2d well there's a an abundance of literature on a tds but we wanted something very simple and something that consumes very little power and it still achieves a resolution of something like 12 bits so my students started thinking about this now here's the overall architecture you can see that we have inq inputs we have two of those delta sigma modulator loops and then we have two adcs so this system uh provides the highest power efficiency 50 reported for wideband cdma and i just want to talk about these a2ds a little bit again as a an example of new circuit ideas okay so here's a simple circuit this is called a delta modulator not a delta sigma modulator this is an old idea and the idea is that we have a comparator receiving an analog signal and clocked by some clock frequency and it's embedded in a low-pass filter so what happens is that this output just jumps between zero and one that's what the comparator does and the average value of this output as it jumps to zero on one is extracted here and compared with the signal so this negative feedback loop wants to make this average signal track this input which means the output has a bunch of ones and zeros whose average is equal to the input value so that's how we digitize this signal and generate a sequence of ones and zeros so you can think of it as a poor man's analog to digital converter now for what we want to do this is very nice and very simple but this resolution is not enough so we have to play some other tricks to get it to that point now if we analyze the circuit we see that it introduces quantization noise because it models an analog signal by a bunch of ones and zeros and that quantization noise has a shape like this as a function of frequency and around here it can be small so if we find the spectral density of quantization noise at low frequencies we observe this type of equation which says we need to maximize the clock frequency here and also the rc product here okay so now what my student did is in order to increase the clock frequency he actually uses two of these in an interleaved system so when the clock is high we clock this guy the clock is load clocked this guy so we double the speed and then he also plays some other tricks for example he applied a simple notch filter at the input of this comparator meaning right here to reduce the amount of clock that appears here and that also improves the gain of this amplifier this gain that that we have here this a0 so again just to give you a highlight of the new ideas that keep coming up in our community okay let's talk about another interesting field of research quiz number three what is this well this is the aerial picture of a building this building is 30 000 square meters in area now this building is from facebook so this is a data center one of the many data centers that facebook has of course google and microsoft and many others also have data centers data centers present a profound challenge to circuit designers today so let's go inside here and see what's going on so inside here we have racks and racks of servers these are just several computers that connect to each other so we may have a transmitter that goes and connects to the receiver over here we have data traveling from one server to another on a pc board or through wires or cables or even optical fibers so some fun facts about these data centers number one the cost of building a data center is 7.5 million dollars per megawatt of power that it draws so independent of the number of computers and land and everything else this is the cost this underscores the importance of power consumption in these systems in fact gets so hot here that they need very serious cooling equipment here so that this person can actually work in this environment okay second seventy 70 of the world's data traffic is within data centers so to handle all the pictures that we upload and download all the videos that we send these data centers have to work really hard but most of the data transfer is actually inside the data center not outside and that's why the energy consumption here is so high and so critical all right generally we have two megawatts per 1000 square meters we have one megawatt for 4 000 servers and for facebook's data center in north carolina that building i showed you it costs 400 million dollars and get this is has the carbon footprint of 45 000 apartments all right so there's tremendous pressure on these companies to build data centers that are more power efficient and you can see that a great deal of power consumption goes into these connections between the servers 70 of the data goes between the servers in here right okay so let's look at a simple example of how this can be accomplished i have a transmitter that generates a bunch of ones and zeros this is my data at some rate for example 56 gigabits per second this data wants to travel and go to the receiver there's some sort of medium here it could be a trace on a pc board it could be a cable any other medium so let's say this cable there's a cable and this cable inevitably has a low pass characteristic meaning that it attenuates high frequencies that's not much we can do about that so the nice data that we have here is severely distorted by the time it gets to the other side so our receiver has to receive this data and reshape it and clean it up so that eventually it resembles the data that we transmitted and that receiver takes a lot of building blocks that we won't go through so here's the situation in this example we have a great deal of loss at for example 28 gigahertz the convention is to specify the loss at half of this frequency half of this bit rate so 25 db of loss and this 25 db of loss has to be handled by the circuitry that we have here all right so in this paper we talked about this is a receiver for this application that achieves a much lower power consumption than other examples and we will see that there's a trade-off between speed and power consumption and the loss of the channel but just to give you a flavor of what's involved i want to talk about this little equalizer here okay the rest of the circuit you can read the paper but just let's talk about the equalizer okay so what does equalizer do well here's how it goes we have a channel that has some loss and i place this continuous time linear equalizer here and my hope is that the frequency response of this circuit is like this so that when this frequency response is multiplied by this frequency response we end up with a flat response right then the data the net data coming out here is not affected it will not be distorted so we need a set amount of boost provided by this circuit the circuit is a high pass filter so to speak so how do i build a high pass filter that gives me for example some 20 db of boost well that's not that straightforward at these frequencies so for example you can envision a simple differential pair with resistive and capacitive degeneration so at low frequencies the gain is given by the resistance and gm and rs at high frequencies this capacitor shorts it out so the game will be higher right it will be given by gm times rs rd so we can see yes we can do something like this with two of these stages we can get about 9 db of boost but that's not enough so how do we do that well one possibility is to do the following we recognize that we are in the need of gain at high frequencies right because the loss of the channel is also at high frequencies so what we do is we take the circuit that we had i just showed you the differential pair with inductor and resistor nodes and we add a feed-forward path here that injects this signal into this node and hence increases the gain at high frequencies you can see that this is a high pass filter right because this inductor is short at low frequencies so the implementation is pretty straightforward you can see that we have a the original differential pair we add a new differential pair m3 and m4 which injects the signal at nodes x and y the output is still here and that increases the boost factor at high frequencies so we can write the model and equations and so forth but what i want to show you is the following when we had the original circuit its response as a function of frequency was like this it had some low frequency gain then went up to some high frequency and then because of the parasitics at these nodes the draw the response drops when we add this feedforward path here we have this response is a high pass response provided by these inductors by these inductors and this uh the gm stage now when we add these together we see this blue response you see that the blue response goes to higher amount of boost with respect to original design and it actually extends the bandwidth as well so with these together we can improve the performance considerably in fact now that we have this idea why don't we go ahead and apply it to both stages that we had in our ctle in the equalizer so we have gm stages here and then this gives us a greater boost factor it improves the bandwidth of the circuit and it doesn't occupy any additional headroom because the currents from these devices flow through the inductors not through the resistors so this gives us a boost fracture of 12 db now judging the performance you might say that oh it's only 3 db improvement with respect to what we had before but that's not how we should think about it we should see how this circuit performs when it is preceded by that lossy channel like the cable so let's see what happens all right so if i start with the original equalizer design and the channel the cascade gives me this response so i still have attenuation at high frequencies now if i come along and i introduce these feed forward techniques uh the first feed forward brings us here the second one brings us here the third one brings us here so the final response is this blue response that goes all the way to this frequency of about 20 80 20 some gigahertz before it drops so we see that with these techniques we have improved the flatness of the response of the channel and the equalizer together and that helps with the data that is received by the receiver okay i wanted to say a few words about the terahertz challenge in the area of wireless communications before i wrap up well we know that we have various carrier frequencies in the spectrum with various standards so wi-fi operates at six gigahertz so that's way out here then we have 5g radios around 30 gigahertz we have y gig around 60 gigahertz and so on but a band that's particularly interesting is around 300 gigahertz because it's 50 gigahertz wide so it can accommodate high data rates so there's a great deal of interest in data communication at this frequency around 300 gigahertz and 300 gigahertz for some reason is also considered terahertz even though terahertz is 1 000 gigahertz in any case so that's what we call terahertz data communication and in fact there is a standard that is under development by the ieee for for this data communication system okay so if we were to design a receiver for this type of frequency how would we do that all right well first we have to decide whether such a receiver is competitive with the present solutions the present solutions are wi-fi at six gigahertz and y gig at 60 gigahertz so let's enumerate all the advantages and disadvantages of these three standards so the bandwidth of course is up to 50 gigahertz here so that's much better for terahertz the antenna size is much smaller so that's good we can have lots of antennas in a very small form factor in a small device so that's great but then there are other issues if you look at the path loss as the signal propagates across for example one meter from here to here we see that for wi-fi we have about 50 db of attenuation for y gig 68 db for terahertz 300 gigahertz 82 db so the signal drops dramatically as it goes even for one meter and also in terms of the challenges in circuit design the maximum frequency operation of a transistor which we call f max divided by the carrier frequency is like this here the carrier is 6 gigahertz so this ratio is 69. so our carrier frequency is much lower than the maximum frequency that the transistors can handle so that's great it makes the circuit design much simpler on the other hand for 60 gig the ratio is 7 so that's still that's difficult and then for terahertz it's only 1.5 because f max is on the order of 400 or 350 gigahertz so you can see that if you are designing circuits for terahertz we are very close to the maximum ability of the transistors in terms of performing functions and that makes it very challenging okay so how can terahertz compete with wi-fi or white gig or first of all because of this very large loss it needs to incorporate extensive beam forming it has to have many many transmitters and many many receivers so that eventually there's a possibility for communication across some reasonable distance and also each of those receivers and transmitters must consume a very low power if you want to have for example 16 or 64 of them on one side and 16 and 64 of them on the other side so the power consumption becomes critical for these transceivers at 300 gigahertz so if i want to design a receiver at 60 gigahertz okay i have an antenna i have a receiver i have a local oscillator that drives the down conversion circuits in here what kind of challenges do i face well in the signal path of course we have to worry about the noise figure and gain and bandwidth and power consumption these are the usual suspects that we have in any receiver design here the situation much worse because our transistors don't have much ability to handle these high frequency signals in the yellow path we also have issues right so here we need to generate large voltage swings here so that we can switch these mixers on and off uh very well the phase notes of this oscillator is a problem we need to generate quadrature phases i and q phases to drive these mixers uh we need to phase lock this oscillator phase locking at 300 gigahertz oscillator is not that trivial we have to have frequency division within that phase lock loop and we have to worry about power consumption so many many interesting issues but on top of that um if you are thinking about b forming as i said that's critical the question is how do we exactly perform beamforming how do we change the phase shift somewhere in the in this pattern in this pathway in this path to accommodate beam forming now i wanted to also mention that here's the chip that we have developed for this receiver with the hello and etc but as you can see there's a great deal of complexity in terms of inductors and transmission lines etc and all of these have to be handled in our design so we have to be able to analyze and model all of these components at frequencies of several hundred gigahertz in order to be able to predict the overall performance of the circuit so the modeling aspect of things also becomes a big challenge okay so uh you might say why don't we just use direct conversion this is a well-known architecture that we use for most receivers today so their conversion takes the signal at a carrier frequency of fc and translates it to a carrier frequency of zero the base band so that's easy but in this process we need to have the quadrature phases of the lo okay well how do we do that well so there are some interesting issues one is that because the transistors are so close to their maximum frequency of operation this amplifier may not have much gain and may actually have significant noise so here's what we see if we try to build this part and this part and this part in 28 nanometers cmos technology this is what we get is that the gain actually from here to here is not even one is less than zero db and the noise figure is high because the noise figure is about 23 db okay now if the lna is not doing anything useful why don't we just eliminate it so we can eliminate it we can avoid the lna in that situation we see that uh the gain is actually a little lower but the noise figure is better noise figure is about somewhere between 18 and 19 db so maybe this is a good candidate for us but there are other problems that become interesting and they have to do with the lo so let me skip this slide and go here so i want to generate these two yellows that are 90 degrees apart so something like this right okay so let's say somehow magically i do that and now i'm trying to get these yellow phases from wherever they are generated on the chip to these mixers away from somewhere on the chip right so here's the the situation we have these wires coming in this is our mixer these are our mixers here and then these are bringing the lo signals i and q so what if there's a one picosecond mismatch between these wires and these wires that can easily happen right well because i can mismatch changes the phase relationship to something like this the business patch is now 108 degrees so we're not talking about a few degrees we're talking very large amounts and correcting this amount of phase mismatch would be extremely difficult so we can't really do this we can't really bring 300 gigahertz to these points and hope that we generate baseband signals with proper phasing so these are interesting issues that we address in this work and this book will be presented at iscc 22 and you will see that in this paper my student demonstrates a 5x power reduction for a 300 gigahertz receiver with entry below generation so i encourage you to read this paper and learn about the techniques that we have introduced and then also there's another paper by my other student yujao that is also interesting fractional and pll this concludes my quick summary of the research that is going on in my group i hope that you have enjoyed it

Channel: Long Kong

Views: 7,365

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Id: TCI-BfIm4J8

Length: 53min 51sec (3231 seconds)

Published: Sat Dec 25 2021

Reddit Comments

[u/LeadershipComplex958]

Is that the Prof. who's always recommended to students taking Electronics for the first time?