New IBM Breakthrough explained

while we are keep on chasing the moore's law ibm together with samsung have made another breakthrough in semiconductor technology they've designed a new vertical transistor entitled vt fat this technology is actually one step ahead of the current state-of-the-art transistors ibm claims that this technology will provide two times the performance or 85 percent greater power efficiency over the current finfet designs so now let's have a look on how this microchip technology is made and how it is different from the technology which is right now in our phones in today's world microchips are simply the heart of every electronic device you can imagine from phones to cars which we drive to rockets which we shoot in outer space every single chip is built out of transistors i love these tiny guys because without these tiny transistors our modern world would simply collapse these tiny transistors control the flow of electric current and these transistors can be used to build anything from simple logic gates to cpus and gpus and the more transistors are packed in one chip the more compute it can perform and those transistors are really tiny nowadays for instance a human hair is about 0.1 millimeter thick so even a large 10 nanometer transistor is 10 000 times smaller just imagine this here is a traditional planar transistor you can see that the current is flowing through its gate horizontally but this one is so old-school let's leave it for now nowadays all the cutting-edge chips like latest amg chips intel chips apples and one pro chips are built in so-called finfet technology here is how a thin fat transistor looks like in a thin fat transistor the channel is stretched up as a vertical fin which is contacted on all three sides by the gate the thin fat construction makes the channel three-dimensional which provides superior current drive for the same area compared to the planar transistor compared to a planar transistor finfet is more advanced version it enables actually a smaller footprint which means it allows to pack more transistors into the same area and also to get lower power consumption the thing is traditional planar transistor as well as finfet transistor are both literal this means that the current flowing through this gate horizontally earlier this year ibm announced new two nanometers gate all-around transistors so what essentially ibm did they took a structure similar to the fin in finfet technology turned it horizontally and stacked several of them one on top of another those tiny stacked structures are actually called nanosheets and the gate is all around them so now the transistor channel is within the nana sheet and it is even better controllable by the gate in comparison to the finfet technology with the giggle around technology ibm was able to achieve really really high transistor density actually they were able to pack about 50 billion transistors in a die area of 10 millimeter square so something like my nail you know this transistor technology was the state of the art until this moment so it was the densest transistor technology until today however shrinking lateral transistors down becoming more and more challenging so the way to break this barrier is to build vertical architectures so some days ago ibm announced another semiconductor breakthrough new v2 fat transistors it means vertical transport nano sheet field effect transistors you know the main idea of the technology scaling is to fit as many transistors as possible in the unit area at the moment lithography has limited resolution of about 5 nanometers so the way to push integration further is to grow vertically and this is exactly the idea behind vthat instead of multiplying the number of fins horizontally they've actually stacked the gate vertically and this enables the integration of more devices per unit area so vt fed innovation focuses on the whole new dimension these transistors are being stacked vertically on the top of the substrate doesn't it remind you of something you know we've already been staking chip dyes one on top of the other which is this tubular technology or 3d chips integration which i discussed in my previous video so this is the next step here in such a transistor electric current flows vertically and this is the key difference in the past designers packed more transistors into a chip by shrinking its gate and wiring pitches actually by directing the electrical current to flow vertically the gates spaces and contacts are no longer constrained in the traditional ways in this way they were actually able to use larger source drain contacts and to increase the current on the device and in this way we got more room to scale down also this will help to reduce the interconnect length and make it more cost efficient and these new vt fat transistors do not rely on the same approach to measuring tech nodes so the tech node for these transistors does not correspond to the gate length in two words for all this new state-of-the-art technology the tech node is defined by the driving capability of the transistor but actually you already know this trick from my previous video on the ibm two nanometer transistors another advantage of this new technology is power each technology shrinking brings power benefits they come from faster devices and lower supply voltages and uvt fed technology is not an exception here this technology promises over 85 percent improvement in performance pirate over the state-of-the-art finfet transistors and this is a lot and this actually means almost doubled battery lifetime for our mobile devices and i see a huge potential in both high performance and low power application by this technology scaling this new technology will benefit to many exciting real world applications like hei autonomous driving and iot ibm has already fabricated their first test chip in this new vertical transistor technology and good news actually the magic works it is unclear when vtv technology will become commercially available i would say in approximately two three years we will have to wait and see which performance metrics they can achieve with this new technology but this type of research is certainly so exciting and essential to the continuation of the more slow actually ibm and samsung are not the only chip makers developing these stacked transistors intel is researching staking multiple transistors on top of each other to raise the chip density to new levels the company has already been staking the chip dyes one on top of each other with their favorite technology the one i discussed in my 3d chips video stacking dice is one thing but they've been also working on stacking transistors on top of each other and i think it is indeed a great idea currently intel processors rely on nmos so n-type metal oxide semiconductor and pmos transistors which are placed side by side now the idea is to place these transistors and moss and pmos one on top of each other to free up some space for more transistors and to achieve higher transistor density in this way they are able to increase the transistor count by 30 or 50 for the same footprint and this is epic actually they can build both nmos and pmos transistors in one step rather than building them separately you know this helps a lot with alignment issues and reduces the number of manufacturing steps the transistors taken technology could one day succeed intel's upcoming ribbon fat transistor according to intel's roadmap this one will be reduced in 2024 using intel's 20a manufacturing process oh and one more thing in parallel to this research intel is also working on creating magnetoelectric spin orbit logic device so called meso device where they use nanoscale magnets to build a new kind of transistor and this one makes me curious and of course gsmc is heavily investing in the technology development a bit earlier this year tsmc together with mit announced a semiconductor breakthrough towards one nanometer transistor you know they've actually developed a new set of materials which can be used to create an old-school planner transistor and scale it down towards one nanometer the key here is to use a semi-metal beast mode as the contact electrode to replace silicon employing this material helps to reduce leakage current which would drastically improve the power efficiency anyhow i have no idea how they will manage lithography with such a tiny one nanometer dimensions i'm thinking now that this year technology guys are making really good job they're actually making one breakthrough after another one and this is mind-blowing it seems like this new vte5 technology will enable the further transistor scaling and will keep the more slow alive for years to come if we just have a look at the last decades the improvement in processor performance is incredible my phone now is more powerful than computers which were used some time ago to send men to the moon and this technology scaling will further boost both high performance and low power applications all the emerging technologies like internet of things cloud computing 5g autonomous driving and ai will definitely benefit from this technology i'm really excited to see where we will be in the next decade when we will go under unstrong dimensions and how these future transistors will look like anyhow i will be for sure covering it in my future videos if you love transistors as much as me make sure to give this video a like and consider subscribing to this channel now you may like to check out another video on my channel where i explain the new 2 nanometers ibm transistors in all the nitty gritty geeky details i will link it here thank you so much for watching and i wish you happy holidays and i will see you in my next video ciao [Music] um [Music]

Channel: Anastasi In Tech

Views: 3,630

Keywords: vtfet, VTFET, new IBM technology, new transistors, vertical transistors, new IBM transistors, IBM transistor, vertical transistor IBM, new IBM Samsung transistor, vtfedit tutorial, ibm new technology, ibm news, transisotrs explained

Id: IHxv8ehrx2Q

Length: 13min 19sec (799 seconds)

Published: Sat Dec 18 2021