HC31-K1: Delivering the Future of High-Performance Computing

welcome to hot chips 31 keynote one dr. Lisa sue on delivering the future of high-performance computing you I'm Chris Koster ragas I'm the co-chair of the conference is a really great pleasure to introduce Lisa sue the CEO of AMD as our keynote speaker Elissa is one of this amazing individual who is highly accomplished both on the technical side and the business side of our domain I could probably take the whole one hour slot just reading her resume but I'm gonna try to be out of here in one or two minutes she got undergraduate masters and PhD degrees from MIT spent most of her early career at IBM where she became the vice vice president of semiconductor research then moved on to Freescale where she was the CTO and a senior VP of the multimedia networking business and since then has been at AMD as a senior VP CEO and now the CEO the CEO it's a really great opportunity to hear talk about the how she sees the future of high-performance computing there's something that AMD is driving both from the CPU and the GPU point of view so Rakitic side to keep here today good afternoon so we're really thrilled to be here today and I you know hot chips is an incredibly important conference when you think about you know the who's who of of trips and architecture being here and so to have a chance to address this audience as as a keynote is is really our honor so what I'd like to do over the next you know 45 minutes or so is talk a little bit about our vision of high performance computing you know my personal belief this is the most exciting area in the semiconductor industry what we get to drive as a as an industry and really as an ecosystem the truth is there are always lots and lots of challenges and we know that there are lots and lots of challenges and the good thing about challenges it's it creates great opportunities for all of us as as engineers so you know let me get you know started and with with our talk here so just a little bit of background so for those of you who know the history of AMD we actually turned 50 this year our 50th anniversary was an early May and you know the thing about companies that turn 50 is you know you have to do a lot of different things you almost have to remake yourself you know at least every every five to ten years but you know our view of the world is you have to push the envelope on innovation as you push the envelope on innovation you're always surprised by what you can do all the things that you say you can't do when you put really good people on it you find a way to break those barriers they're just like breaking the gigahertz barrier the first to the 64-bit architecture next eighty six most recently really pushing the envelope in high-performance computing on both the CPU and GPU side and most of all trying to deliver more to the ecosystem and more to the application environment so why is high-performance computing so interesting I think this is obvious for this crew but just to set the backdrop there's so many things that are driving the industry today whether you talk about the explosion of devices so tens of billions of devices that we each use that we use in our and our play and in computation and you generate just an incredible amount of data and that data has to be analyzed that data has to be processed and most importantly we need to be able to make decisions on that data and so if you really think about what's driving the future of high-performance computing it is really things like what are going on in the cloud and the hyper scale environments what's going on with machine intelligence and machine learning that I know has been a big topic of hot chips this year what's going on in big data and big data analytics as well as you know just the overall data center so I think the key message of all of this is no matter which of these applications you're talking about you need more and more compute you need compute to progress forget about whether Moore's Law is alive or dead I mean that's you know sort of an interesting conversation but more interesting thing is the applications need us to be above Moore's Law we need to do more than the industry has done in the past because the applications and the data are such that there's a lot more you know computation that's necessary so with that as a backdrop you know what we did is just take a look at some of the trends over the last you know let's call it 10 to 15 years in high-performance computing so it just gives you you know a flavor of what we have done you know not just what AMD has done but really what the industry has been driving so take a look at this which is some trends over the last like I said 15 years or so that look at GPU performance as well as server level CPU performance and what we're prop plotting is industry trends across products that are that have been launched and you can see you know we're roughly doubling performance let's call it every two to two-and-a-half years whether you're talking about you know GPU floating-point operations or you're talking about spec and rate on the CPU side so that's sort of the Ray pace of innovation we had you know relied on process technology and process technology to deliver a significant amount of gains and I know you know Philip Wong he's going to talk tomorrow about some of the trends in the next node and what you find is yes process technology is very important process technology continues to be very important but the amount of improvement that we're getting on the fundamentals of the process technology so the you know the doubling of density and the doubling of power efficiency are actually not keeping up so we're not doubling density as fast because of you know lots of fundamentals in lithography and device design and so on and so forth and on the energy efficiency side you find that you know power is now let's call it you know one of if not the most important constraint as we're designing our our next generation processors and so process technology is important but we need to do many many other things to try to keep that performance curve or frankly to try to extend that performance curve so when you take a look at some of these components and I know there are many components here but what we try to look at is you know if you plot the performance gains over the past decade and this is now looking at primarily the CPU side you can see that there's a mix of many different elements that gets us that doubling our performance every two and a half years you know you start first the process technology it's still the largest piece you know let's call it 40% of the story and that's you know the fundamental you know density improved transistors those kinds of things but frankly we have to do many other things and so in the gray is what we would consider let's call it the silicon based things so you can do things like you can increase the die size so you get more transistors for each you know given generation you can increase the power you know you notice that you know power has been increasing as we have gone over the last five six seven years and then in the orange you have let's call it the more architectural things so you know micro architecture for example you know extremely important and we'll talk a little bit more about micro architecture power management extremely important you know whether you're talking about mobile power management or you're talking about power management on big server die your performance is basically limited by your power and so the extensive power management techniques are being are being utilized today and then of course there's a huge importance of optimizing both architecture and software together and so this just gives you you know a sliver of you know some of the compiler optimizations that can be done and in this particular case when you look over the last ten years roughly sixty percent of it are you know let's call it you know silicon advances and about forty percent of it are more architectural and software advantages so lots of work to do on each of these each of these vectors now what we'll go into frankly is it's getting harder and harder on each of these vectors and so we're pulling out yet new tricks and new ideas to extend high-performance computing taking a look at some of these you know barriers of performance improvement that you see in the trends like I said you can say whether Moore's Law is alive or dead I think it's fair to say Moore's Law is slowing we love new technologies you know seven nanometer is a great technology it's one that we believe has provided tremendous value and you know five nanometer will be there as well but the distance between nodes is increasing so the distance between 14 nanometer and 10/7 has increased and that has reduced some of the performance gains that we've gotten addressed based on process technology the other thing you know since I'm a CEO I can talk about this right costs continue to increase and at the end of the day I mean the cost per millimeter squared or the cost per transistor really allows you to decide where do you use that great process technology you will not choose to use that new technology everywhere because frankly it doesn't pay off but you will use it on the most important transistors and you know that's a trend that will continue to increase as we go forward in time just given you know the complexity of process technologies going forward take a look at SOC power trends the idea that power has become you know sort of the first order optimization I think you know really you know came about over the last let's call it you know seven eight years but we keep trying to push the envelope right on our highest performance processors as well as our competitors we keep trying to push the envelope on power we've gotten better in terms of cooling technologies and cooling capabilities but still you know you're only increasing power you know let's call it on the on the order of you know high single digit percentage per year so we'll keep trying to push the envelope but you do reach some some important you know just physical capabilities of how you can cool silicon the other thing that's pretty interesting is if you look at the donut you know we started with our goal in life is to do as much computation as possible and so that's what we try to do and all of our processors but you realize that the pure computation portion of it is actually not that big the pure you know the the power that is utilized on computation is about a third of the overall processor power and you end up spending a lot of power on the i/o and the interfaces and really getting things you know on and off chip and so that again is one of the reasons that we're not getting as much benefit from scaling as we go forward we also look at die size our chips are getting bigger and bigger and as our chips get bigger and bigger you know we're to get more computation on chip but at some point you do meet the fundamental limits of the reticle sighs I know later today you'll hear a little bit about other techniques of doing that but when you look at it overall you know when you look at our large GPUs they are really pushing the fund you know sort of the very large die sizes and when you have very large die sizes you know frankly you're not very efficient in what you're doing with the technology the yields are poor the costs are higher and you know there's a lot of routing across the chip that must must happen so you know we have seen these increases in die sizes over the last ten years but that will also slow given some of these these fundamental principles so what do we do about all this and as I said earlier you know the wonderful thing about technology is when you put good engineers to work they find great solutions for some of the challenges and what I'm gonna go through you know over you know the rest of the talk it's just some of the ideas that that we've implemented in AMD products as well as others have implemented as you look at trying to solve some of these fundamental scaling challenges and you know the way I like to say this is you know our industry is about making big bets all right we make decisions really three to five years you know sort of ahead of when you actually see something in product and so you have to make the right decisions or you have to make more right decisions than not and some of these techniques are are exactly that you know trying to predict where do we think those limitations are going to be in the future and ensuring that you know we make the right bets to keep extending you know processor performance going forward so a couple of things when you look at performance we're gonna look at performance very holistically and this is not again this is not a single company view frankly from my perspective the only way we're going to be successful at staying above the curve in terms of high performance computing is if the ecosystem works together so whether you are a you know silicon provider or a systems company or software company or all of the above because often you have to combine all of the above I think the ability for us to bring together the best of the ecosystem in silicon systems and software is really really important for us to maintain the trends around high-performance computing so in terms of silicon advances I'll talk about a couple of things I think you heard from our team this morning about our Xen to Architecture and they went into detail about what went into that architecture but that's one of the key things one of the key things for maintaining the performance increases of high-performance computing is to include to ensure that you have a very very optimized microarchitecture and you know the funny thing is just when you think you've finished one generation you realize all of the things that you didn't get done and you put that into the next generation so when you look at you know our Xen architectural lineup you start first with what the industry trend line is in terms of improvement and the industry trend line you know depending on how you look at it is anywhere around you know mid to high single digits in terms of IPC improvement over the last five or six years the Zen microarchitecture was introduced in 2017 we've enhanced that with the Zen 2 microarchitecture that was introduced this year in 2019 we have this n 3 and n 4 micro architectures that are deep in development and our goal is to stay above the industry trend line that's our goal and as much as you learn in each generation we learned in each you know we learned in the first generation of Zen what we can improve in Zen too and that's going on into the future generations as well and when you take a look at those types of optimizations they really have you know significant improvements in the workloads so if you just take a look at IPC the the top chart is the you know components of you know speken trait as you look across the various components and it shows the IPC uplifts then to design one across the various components and you can see we get about an average of 15% or so and that comes from the improvements in the micro architecture or the improvements and some of the memory memory in the latencies and so on and so forth but when we take it to server workloads and when we take it to multi-threaded workloads and throughput workloads the bottom chart shows in a you know 32 core processor comparing Zen 2 to Zen 1 you actually see significantly more uplift and that is you know optimization on every part of the system counts and in this particular case you know server workloads love throughput and with that the enhanced memory architecture the better memory bandwidth as well as some of the better multi-threaded performance results in significantly higher uplifts on multi-threaded workloads compared to single threaded workloads so that's an example of you know a set of focused efforts that result in significant micro architectural improvements now the other piece of you know sort of the the big industry trend is you know I mentioned the fact that you know die sizes are getting to the point of the vertical limit and transistors are extremely expensive and so when you see those two trends you know we saw those two trends certainly back in the 2013-14 time frame we said look something has to change you cannot keep doing just bigger and bigger monolithic chips you can I mean yeah you can't do it but you just won't get the performance and you won't you won't you'll see you know the curve bend over and so we made a big investment in multi trip architectures and again if you look at you know our first generation epic architectures and based architecture it was really based on you know we called it you know for triplets which were uniform triplets that were put on a multi-chip module and the idea of this again was to get more bang for your buck it was to ensure that you got more performance at a better cost point so we got better yields by using smaller dye and you know with that we had a nice architecture with that as we migrated into seven nanometer we enhanced this you know idea of triplets to really try to optimize the right transistor for the right technology so in the second generation epoch which was just launched very recently on both our desktop processors as well as our server processors we decided that the most valuable transistors were the CPU and so those were done in seven nanometer but the ione memory frankly which wasn't scaling all that well was actually done in an older generation technology in 12 nanometer and so what you see with that is each IP is in its optimal process technology you actually get a very nice architecture and it breaks some of those trends of the radical limit as well as some of the trends of the of the cost per transistor and frankly it gives us a ton of flexibility so with the same basic design you know we can go across high-performance desktops you know you will see this in high-performance workstations as well as high-performance servers so it's an example of where you know innovation around Triplette architectures really gives you tremendous bang for your buck you know going forward now when you look at what that means from the technology curve you know as we said our goal is to always stay above the industry curve so if you look at this this is historical data center performance over the last five years and it's you know showing two socket server performance and again you know you see of a steady trend somewhere between 15 to 20 percent a year the way you get that is your increasing power budgets you're increasing diarrhea in many cases you're increasing cost but with the Zen based architectures you actually see a significant change in the slope of the performance so going from first generation a Zen architecture to the second generation of Zen architecture in a server configuration we're actually able to double the number of cores double the performance significantly enhance the single-threaded performance and most importantly a significantly intense the total cost of ownership which is what's important to data center data center guys so an example of where you know some of the bets actually has paid off significantly in enabling us to go above the curve now let's talk about some of the more interesting parts of the system design because you know as I said in addition to all of the things that you do in silicon which are you know we all love to do we all love to optimize there's a substantial amount that you have to do on the system side and frankly the more you know about the application the better we are able to optimize both system as well as silicon so you know the key and you know obviously over again over the last number of years it's really become apparent that there's no one-size-fits-all in computing as important as CPUs are and we think they're extraordinarily important there are numerous other parts of the system that have to be optimized and that includes leading-edge GPUs that includes FPGAs as well as you know custom Asics or accelerators and the key in these computing platforms is you actually want to pick the best computing that you can for each application so the idea is you know depending on what your workload is you might have a different ratio of CPUs GPUs or a different ratio of you know CPUs GPUs and accelerators or depending on the maturity of your software you may choose to want to use FPGAs versus fix function Asics but all of that still needs to connect in a system otherwise you're not going to get the performance however good your intrinsic piece of silicon is if you don't have the right fabric or the right interconnect to put them all together you are not going to get the performance that you anticipated with that that great idea so our job at AMD as well as our job with the ecosystem is to figure out how we can put together very very efficient computing platforms and that requires innovation on every aspect of of the system so again how do you decide what to use it very much depends on the application that you want to use so if you look you know this is a you know sort of a little bit of a stick diagram but you know you get the drift right if you look at performance per watt versus application you know the beauty of CPUs is that they do lots and lots of things they're quite general-purpose so you have a broad application space a broad software development community for some functions it will not be the best thing to use if you use a GPU configuration especially for highly parallel applications you will get better performance you'll get good program ability a narrower set of applications if you want the ultimate in performance you probably do need to use something custom and whether that's a custom SOC or custom fpga custom ASIC but you're designing for sort of a narrow application and that has its own you know set of challenges in terms of the ecosystem so we want systems that optimize for all of these different types of components and you know with that you know if I give you one example of what one of those systems look like you know it's taking a high-performance CPU connecting it to let's call it a set of for GPU accelerators you want the highest possible interconnect bandwidth between these devices so you know being you know pushing the envelope on getting a PCI gen4 into the equation also optimizing the bandwidth between the components so ensuring that we have the highest bandwidth between GPUs and GPUs also is very important for the performance and all of these you know end up becoming sort of the elements of what you can call an accelerated platform or a heterogeneous platform so the other piece of it is knowing and understanding your software and knowing and understanding your application so no matter how you look at it you know we as silicon guys need to make sure that our silicon is as programmable as possible to deliver the system level performance and so you know from that standpoint there is a whole bunch of stuff that is let's call it on the order of getting the most out of your silicon you know we like to say you're trying to get the the libraries the profilers debuggers compilers all of those things as optimized to silicon as possible but then we also believe very very strongly in a open source environment to sit on top of it so that everyone can contribute you know to to this and so whether you're talking about machine learning environments today where many people are writing to tensorflow or pi torch or MX net you know we do all the work to make sure that on the tools side that it's optimized to the silicon we want to make sure that the interfaces are open to the broader you know application environment and so the key is as we go forward there's even more need to have this hardware and software Co optimization so that we get the best out of the performance capabilities so with that you get sort of a view of what we believe are this important thing to drive high-performance computing and what I wanted to do now is really pivot to just one of those applications and give you an idea of what that looks like and a little bit more granular level so now we're talking about high-performance computing in a generic computing sense that we want more and more compute cycles but we can also talk about high-performance computing as it relates to HPC or supercomputers so you know I think of supercomputers as the best manifestation for all of the innovation that we can come up with right in some sense for many supercomputers cost is an object but it's not the highest you know it's not the first order its object the first order object is how you can how you can do something that's never been done before I mean that's what supercomputers are really about is how do we push the envelope with computing to enable us to learn something or to solve a problem that has never been solved before and so when you look at sort of the explosion of HPC it's really kind of interesting I mean it's gone through you know many many gyrations of what people use supercomputing for but whether you're talking about a commercial environment where you're trying to learn you know more about you know simulations around chemistry or medicine or you're talking about you know learning more about climate change learning more about space exploration lots and lots of machine learning applications all of these applications are really now mixing what was traditional HPC with the new machine learning you know methods and I would say that most would most would agree that these two areas are actually coming together very quickly because they share many of the same characteristics right at the end of the day you're trying to solve a very difficult problem that requires lots of computation and lends itself to parallelism so you know those are true of traditional HPC applications as well as machine learning applications and if you take a look at this chart just you know gives you some context of why it's so important so what this is trying to show is basically the amount of time it takes to train versus some of the newer machine learning algorithms and you can see there's just a tremendous amount of development on the algorithmic side frankly you know you're you're getting much more sophisticated in some of these cases these algorithms are getting to the point where they approach humans are better but what it also says is you need an incredible amount of computing power so you know you saw in my earlier charts I said CPUs and GPUs were about doubling you know every whatever two two and a half years in this case for the most advanced algorithms you're actually seeing a doubling of compute consumption every like three or four months I mean if you think about that it's actually a mind-boggling thing you know so what that means is you can come up with these great algorithms and either you take a incredibly long time to figure it out or you build you know large large compute farms or you try to get more efficient compute and you probably do a little bit of each of those things but that motivates some of the reason that we really are trying to push the envelope significantly in this area in particular the other thing to look at is if you look at the world's fastest supercomputers so what this is plotting is if you look at the top 500 chart that's published you know every six months or so this is plotting the top machine and you can see that the top machine you know over the last you know 20 plus years has actually advanced faster than general-purpose compute so it has advanced about you know double every 1.2 years or so but you see that that rate is slowing so if you look at just post-2015 you can see this the curve is bending over a little bit and the reason the curve is bending over a little bit is you find that all of the barriers that I was talking about in terms of the various barriers to high-performance computing in the generic sense end up affecting HPC as well and probably you know to more of an extent and so you see that you see that bending there so our goal is to use significant innovation to try to get that curve you know back on the line and you know learning something about about this you can see various things right if you look at you know this is an example of just a general workload around HPC system performance in this case you know we're looking again at that single CPU - for GPU configuration you could you could use a different configuration but this is a pretty common configuration to use and you can see that in HPC systems your everything is important but because we have that massive parallelism around you know floating-point capability you can see that the GPU computation is a significant piece of the the runtime CPU is also significant the intra node communication is significant as well as a memory bandwidth and then the the bandwidth from node to node so all of these things are important all of these things need to be optimized sort of in in each piece and then the other thing that's you know really interesting is it does vary quite a bit work load to work load so when you look at the performance elements now looking at two different HPC workloads you know the first one is a molecular dynamic simulation so an MD is a key application you can see this guy is very very very GPU intensive so if all I wanted to do is to optimize an MD I might spend most of my time on the GPU computation CPU is also there as well as you know the memory bandwidth and the intra node connectivity and so that's one example right but if you look at the bottom example you know you can see now this is a more typical machine learning algorithm transformer around natural language processing it's actually a lot more balanced it's actually a lot more balanced so yes GPUs are very important CPUs are very important as part of this workload the connectivity between CPU and GPU is important the memory bandwidth as well as the connectivity between the GPU and GPU and so my point of showing you this is you know anyone who tells you that if you just do this everything's gonna be perfect it's just not the case you have to do it all you know you have to optimize CPUs GPUs the interconnect the memory as well as the network bandwidth together to really push the envelope in an HPC so some of the things that are being done certainly a lot of innovation on the GPU side you know GPUs have become more and more prominent in HPC and they will continue to be so you know this idea of if you think about you know how do you get most efficient flops the the the addition of things like pack math and matrix math give you the ability to get more efficient flops across a number of different algorithms and so that's going to continue that's one of the the key areas of innovation going on in GPUs today if you look at connectivity between CPU and GPU again this is going to continue one of the things we will say is that you know the connectivity is not increasing as fast as traditional compute and so you know if you just take a look at you know the PCIe speeds over you know the last 20 years you know we're more like doubling every four to five years this needs more work frankly there needs to be more work around the connectivity we spend quite a bit of time optim that between our cpus and gpus but that's certainly also an industry thing as you think about you know connectivity to accelerators as well and then talking about memory bandwidth you know again if you take a look at the memory bandwidth over time and in this case you're looking at in the orange sort of memory bandwidth in a GPU and in the the lighter gray color the floating-point operations basically what's happening is the curves are diverging a little bit so although we're continuing to invest in very very close coupling between the memory and the computing element the number of the memory been with over time is not quite keeping up so the ratio of memory bandwidth to to compute operations is is diverging a bit we are big believers and high bandwidth memory I think high bandwidth memory has a strong roadmap that is important to continue on a aggressive pace we also look at a lot of optimization within the die so the on die cache hierarchy can have a large impact on these memory bandwidth but as you go forward you can imagine that you know 3d stacking or you know other integration methods will help us extend this memory bandwidth curve as we need it to over time and then when you put all that together so one of the things that you know we're very proud of is pushing the envelope in supercomputing and so just a couple of months ago AMD announced together in partnership with Oak Ridge National Labs at the Department of Energy as well as Cray the next-generation supercomputer at Oak Ridge which is codenamed frontier frontier is the system that will take advantage of all of these optimizations that I talked about so highly optimized CPU highly optimized GPU highly optimized coherent interconnect between CPU and GPU working together with Crais on the node to node latency a characteristics really enables us to put together a leadership system and that leadership system is both important for traditional HPC applications so you know we talked about this system delivering over one-and-a-half exa flops when it launches in 2021 using these next-generation architectures but it's also very important for like I said AI and machine learning applications so the scientists in the in the D OE laboratory systems can utilize this for a number of different applications from traditional HPC to more commercial like you know AI and m/l applications so the key is you know what do we believe that we can do with this very close silicon's system and software optimization we believe at the time of launch that frontier will be the highest performance supercomputer in 2021 and it extends the curb it actually changes the curve once again so that we are going above the industry curve for high-performance computing and again this is what we live for right it's how do we push the envelope on computing with all of these various elements you know of course although these technologies are being designed for the highest performance supercomputers that have you know tremendous tremendous power and you know system capabilities you'll see all these technologies also come into more commercial systems and you'll see this in you know our next-generation CPUs as well as our next-generation GPUs as well to to increase the the computational efficiency so with that let me just summarize and again say we really really believe I believe that high-performance computing is one of the most exciting spaces in semiconductors today the applications are tremendous and they're continuing to increase everyday you saw those those that's those training operations as well as just general purpose computer applications you need to do optimization on every level on the foundational IP so on the CPUs and the GPUs and the Asics the foundational compute elements and triplet architectures that allow you to connect these guys in the most efficient way on the interconnects that allow you to go across these these different compute elements very important is the system and software optimization we want to know what the application is doing if we know what the application is doing we will design better silicon going forward and then of course you know we need to continue to push the envelope on technology scaling and that continues to be an underlying foundation so we look forward to you know really working across the industry ecosystem to keep these curves you know these exponential curves always look nice and you always say hey is it gonna fall off I think the answer is there are enough smart people across the industry to to make sure that we keep the line extended as long as we keep pushing the envelope on innovation so thank you very much for your time today [Applause] all right we give plenty of time for questions so please come to the microphones that your name and affiliation if there are people standing behind you please ask one question and go back to the end of the line so everybody gets a chance Thanks okay my name is then I wanted to ask you where do you think we are on the hype curve with relation to AI application which as you say pushing you more and more and what is kind of the next step of AMD let's say comparable to the TPU T was he was yeah so look I think the question was on you know what is the you know sort of where where's sort of the AI stuff going and what is AMD doing with CPUs and going forward look I think there's tremendous innovation going on in the industry right the fact that there's so many startups and there's so many companies doing purpose-built Asics around new algorithms is just an indication of how much excitement there is I will say that over time I think that's going to narrow all right I think we believe that's what usually happens you know there's lots and lots of lots and lots of new new ideas and then over time it narrows to you know what are the ones that are most sustainable from a performance as well as a ecosystem standpoint you know from an AMD standpoint our goal as I said is to optimize each one of those elements and that includes CPUs GPUs interconnects that may include some purpose-built accelerators but more important to us is connecting the ecosystem together so you know we would invite people to connect their accelerators to our CPUs and GPUs you know across you know across the various interconnects that are out there because you know I don't believe that any one company will have all the best ideas and the more we can get to standards on the interconnects and standards on the software the better that we're going to be for this next generation of AI okay from visitor so relate to to his question right so there are so many like a accelerators for machine learning and deep learning so you mentioned that ope you can have any co system in which if they can connect their accelerators to your your cpus and gpus so basically you're saying that you don't have any plans for your own specifically a accelerator yeah we're talking about path strategy not future strategy right look but you will absolutely see AMD as a large player in AI now our desire to pick the winning solution you know like I said I believe there will be many solutions there's not going to be one solution and the importance is you know we're putting much much more purpose-built acceleration on our GPUs as well as on our future generation CPUs so you'll see sort of more accelerators as part of that and then whether we do our own accelerator will really depend on you know sort of how this evolves you know going forward but the interconnect strategy the the CPU and GPU strategy the ecosystem strategy around the software all of that stays the same thank you so much thank you hello my name is Laura Daisy from Binghamton University my question is from the academic standpoint you mentioned that the power is increasing a lot and I was wondering do you see thermal as a bottleneck or as a limiting factor of this growth and if the answer is yes could you please briefly describe what how you're addressing it yeah so definitely we see thermal as a big driver and you know some of the folks from AMD here in the audience can can talk a little bit more of what we've done if you just look at the amount of power management that are on our newer generation processors in terms of you know the number of sensors the sophistication of the algorithms to tune every part of the chip to tune to various workloads all of that is really important we also look for you know how to best get the the thermal server characteristics across the chip as as uniform as possible you're always looking for better cooling solutions the answer is no question that this is a huge part of the optimization you know we tend to believe that you know you reach some limitations but actually you can put just a tremendous amount of sophistication in these newer generation processors to to tune practically every millimeter squared you know of the chip yes please hi Michael che UC Berkeley extension we thank you very much for the awesome summary about the compute and computing architecture so exciting I was wondering is my own wage that being through the risk versus the Cisco that kind of a silly phenomenon someone else Edsel Eve I was just trying to copy instead of creating my own nowadays I've been hearing a lot of different computing says for example like neural computing quantum computing viral computing maybe bio computing do you see this type of X computing would also recreate the risk vs. Sisk type of excitement of course I don't complain about that excitement is that creating a three years job for me well you know I I think we can all say for everybody in this room we have at least a thirty year job so not I'm not worried about that look I think all of those things are interesting like right now you know quantum computing is perhaps extremely interesting and it's the race to you know who's gonna get there I think we are still at the early stages of figuring out are these let's call it more special-purpose architectures but they'll do some things well but they won't necessarily be the next round on purpose architecture I don't think we know yet I think we're still learning about those about those architectures you know I think the the philosophy here is that there's so much energy around optimizing let's call it general purpose architectures whether you call it CPU GPU accelerators FF PGA's there's so much energy and now these new things have to intercept at some point and I think it's still a little early to say when does it exactly intercept so it's a a great area of research that we're going to continue to do much more research in and we'll see one day you know when they become a significant part of the computation landscape thank you thank you thanks for coming out Lisa my name is Bob I ever liked like to ask your question for the younger crowd probably one of your most demanding customer bases I'm talking about gamers all right you were talking in your talk you touched a couple times about GPU GPU communications is this lead on to a hint that maybe maybe some talk of or some project of crossfire coming back you know we love gamers I say that often when I'm when I'm announcing products I talked a lot about gamers well crossfire come back I would say I would say that GPU performance will continue to go at a very fast pace okay we're doing a lot of stuff you know today frankly the software on GPUs is probably going faster than the hardware I am NOT I'm not saying it won't but I'm not saying that that's a significant that's a significant focus I think the idea of you know we can do so much still with you know GPUs in the consumer space is is where we're we're focused like yeah thank you I Jeff Smith's ooodle so I'm a platform architect for market making creating machines and so there's quite possibly no one else in this whole room that's a bigger fan of low friction low overhead heterogeneous systems so we love to hear that and interchangeability and open Stax so when you're going around with you know pure vendors and discussing standard for open fabrics and so forth how much of that process is driven by sort of inside manufacturer points of view and how much of the levels of abstraction and designs come from outside consumers of these you know aggregate systems I didn't catch the very first thing when you said what you were doing say it again market making platform architect so what Roenick trading okay look I think it's a really good point I you would you would be very surprised at how often this comment comes up of open ecosystems are absolutely critical it comes from you know sort of our customers so if you think of you know large data centers or large scientific operations nobody wants to design to somebody's specific architecture frankly because you know you don't get the best of all worlds right so I think it comes from there and then it also comes from you know end-users you know who also you don't want to see that that optimization it takes an incredible amount of time I think that there is you know you know the the advent of these machine learning frameworks has really been a key piece of that and will continue to be a key key piece of that but I think the more open that we can be in the ecosystem the better we can optimize for all of the computing applications thank you very much thank you I Lisa in from Atlantic good to see you at the show as always recently we've noticed AMD have a new workstation specific dedicated website and also advertised for workstation personnel can you speak about how your current strategy you will develop in the workstation space and also how that relates to certain product names that already exist for examples thread riffin yeah that this wasn't a product presentation this was like a generic industry yeah well I'll certainly answer that Ian look we believe that we want computing in two to significantly advance you know like I said whether you're talking about desktops or you're talking about servers or you're talking about workstations CPU as well as the GPU side I think or if you're talking about notebooks I think what you will see from us is the same techniques that we brought in with Zen and the next generation in graphics architectures will flow through all of these product lines at some point in time I know there's a lot of interest around thread Ripper I see people are wondering when we're going to launch thread Ripper I can say that the third generation thread Ripper will be coming shortly does that help no how about less than a year does that help no if I keep saying no she'll go slow you get into it I think we get to the point that I understand there's excitement around thread River we have just launched our desktop product but you'll see you'll see thread Ripper soon 2019 you will definitely hear more about thread river in 2019 how's that I John masters Red Hat it's gonna ask you Lisa where can we get one of the Lisa Sioux action figures are they available for sale I had a serious question with the in the past a lot of system designs were dictated by traditional enterprise right now a lot of the end customers of the hyper scalers yeah so if you look at you know FPGAs and hybrid systems and some of the work we're doing with interconnects that leads to a lot more opportunity because of the pace and rate the hyper scalars can move at what are the kinds of key differentiating new developments that you think this cloud first model will lead to versus where we were in the past yeah that's a great question John and you know I think this idea of cloud first you know is important because it allows us to bring in new architectures faster you know the nice thing about the cloud guys is they're willing to take risk and they have a lot of really smart engineers and they typically tend to have sort of a restricted set of applications so you take all those things into account and you can say I can bring new technologies to the market faster that being said I think there is a lot of synergy between cloud and enterprise and frankly if you look at customer sets these days they're all looking at like sort of a hybrid cloud environment anyways and so I don't think it's either/or I think it is a we tend to test some of the more innovative topics with the cloud guys because they give us some feedback but they're very similar you know in types of applications thank you Lisa David Cantor here great talk as always I enjoy it so when we look at sort of a broader call to optimization to achieve high performance um what are some of the like maybe top two or three things that you see are exciting from the manufacturing side whether it's a new memory or whatnot from the manufacturing side you mean process technologies or those kind of things you know process technology packaging things of that nature you know be physical design and below right because we have to sort first so so look there's a couple of things you know I I grew up in process technology but I've been out of process technology for a long long time so I'm gonna leave those questions to Philip for tomorrow to talk about process technology but I do believe packaging technology is extraordinarily important and you know it's not the idea that we want to manufacture ourselves but it's the idea that we want whether foundries are osots to think very very differently about how they put these chips together and we found that you actually need to think about bringing some of the you know traditional silicon technologies into the packaging side so that you get finer geometries you get the ability to do two and a half D 3d stuff you get the ability to optimize with the memory vendors so I think that's really important and then you know another thing that's not exactly manufacturing but probably in the same realm is you know just how much we can do pre silicon you know these days and so you know the idea is that we can do you know pretty much you know take a look at the entire system pre silicon and that allows us to really improve time to market you know of the new technology so so when I think about you know how we do that you know when you think about how complex you know these devices are like our second generation epic is I don't know when you put eight you know eight C CDs eight eight core complexes plus an i/o die it's like 38 billion or 39 billion transistors it's a lot of transistors to get right you know trying to do all of that and silicon would take many many many years and and so we're trying to do much much more of it pre silicon including you know not just the the normal you know verification validation but you know really more on the system level in the application level you know as well so those are some of the other you know sort of you know things underneath the covers that that we need to spend time on Thanks looks like I may be out of time or let's think this again for a really great keynote all right fantastic thank you

Channel: hotchipsvideos

Views: 9,782

Rating: 4.9210525 out of 5

Keywords: AMD, Dr. Lisa Su, Moore's Law, high-performance computing, co-optimization, computer performance, computer architecture, silicon design, software design

Id: nuVBid9e3RA

Length: 59min 37sec (3577 seconds)

Published: Thu Sep 05 2019

Reddit Comments

[u/FlustersCuck]

Bonus TSMC Keynote. Both of these videos are better quality than what is available currently. These keynotes took place 8/19 and 8/20. Good watch if your a nerd like me.