A Brief History of Semiconductor Packaging

in this video we're going to look at a brief history of the semiconductor packaging industry packaging refers to the integrated circuits carrier and enclosure it protects the Silicon dye inside from physical damage while also allowing it to be connected to other devices the industry has long been chopped liver overshadowed by the sexier work of wafer fabrication but it's important and we should know about it let's go but first let me talk about the asianometry patreon Early Access members see new videos and selected references for them before the release of the public it helps support the videos and I appreciate every pledge thanks and on with the show ICS are precious little snowflakes they need protection from The Real World which is full of damaging influences particles can get in and interfere with operations moisture in the air can cause their metals to corrode high temperatures generated during operations can cause the IC to degrade or even fail outright vibrations or jolts can damage the Chip's capabilities and so on the packaging is for protecting from all of these threats let's talk about what's inside first we have your die the die attaches to a metal Support called a lead frame oftentimes through the use of Clips adhesive or straps the lead frame has wires attached to it which connect it to the outside world these are called Bond wires and then finally there is a plastic or ceramic or metal enclosure surrounding the die the lead frame and the bond wires this whole setup is considered by the industry as only the first level of semiconductor packaging the second level refers to the circuit board and the third and final level refers to the system's final enclosure like the desktop PC's chassis the process of encasing the fabricated die into its level 1 package is referred to as the back end we can further break down back-end processes to two major steps assembly and test processes differ based on the technology but here is the vanilla workflow in assembly we start by cutting the dies out of the completed wafer and inspecting them after this we have to put the dies onto the package's lead frame called die attach or die bonding or die mounting then we attach the very small Bond wires to the dies which allow the chip to communicate with the outside world this step is called wire bonding and was pioneered by Bell labs in the 1950s after that we put the die into its ceramic or plastic package to protect it from the outside world at the start this process had to be done manually making it one of the first things to be outsourced abroad since then machines have taken over and a swath of new bonding techniques have been introduced discussing them is beyond the scope of this video but you should know they exist throughout its history packaging's goals have stayed rather consistent help the IC achieve its full functionality and don't get in its way be as small as possible and be as cost effective as possible in the beginning only military or aerospace companies use semiconductors price was less of a concern than total reliability Ergo most semiconductor manufacturers package their dies in her medically sealed cans made out of ceramic or steel this prevented any contaminants from messing with the chip but there were serious drawbacks Ceramics and metal cost a lot they're also heavy which meant that the circuit boards they were attached to had to support all that weight this made them heavy too packaging took a big leap forward with who else Fairchild semiconductor when Fairchild started producing their revolutionary planar ICS in the late 1950s they packed them in the same t05 and flat packages they used for transistors just with a few more leads we will talk about flat packs a little later in this video but first let us talk about the t05 the to stands for transistor outline a t05 kind of looks like a squid basically a metal Cannon metal lid fairchild's first micrologic chips were accordingly etched in a round shape but the t05's awkward round shape made it difficult to attach onto and arrange on a board adding to the labor cost worse yet t05s limited how much data the chip can take in and push out they maxed out at just 8 to 10 pins fairchild's New Logic circuits needed far more than that t05 packaging diluted the ic's advantages and worsened its disadvantages with this situation how were ICS ever going to get to price parity with germanium devices and vacuum tubes in response Fairchild developed two new packaging techniques the first was plastic encapsulation it sounds fancy but the way they did it back then was to put the IC die on a ceramic bead and cover the whole thing with a plastic blob this method had some issues plastic can be permeable to certain chemicals leading to concerns surrounding contamination and plastic can shrink or grow depending on outside conditions like heat inflicting mechanical stress on the chips inside however plopping plastic onto a chip required very little skill this meant that Fairchild could Outsource his assembly work to cheap manual labor in Hong Kong or South Korea one of the first such electronics companies to do so fairchild's second idea would forever change semiconductor packaging fairchild's digital systems laboratory head Rex rice created a new lead configuration for an IC the leads were spaced about one hundred thousandths of an inch apart the industry term for this measurement is lead pitch and came out in a single line you would attach the package to the circuit board using what is called through hole mounting here you insert the package's leads through literal holes drilled into the boards the holes have large round solder contact areas surrounding them after insertion you solder the leads on the back side to secure them the method for doing this was called wave soldering Tess found that this new inline packaging system fit all the criteria it can accommodate more i o some 12 to 16 pins at the start it simplified the circuit board layout and finally it took less time and skill to assemble the inline Arrangement was Far simpler than the t05 cans circle shaped leads before deploying the product Fairchild first consulted with customers and end users who did not like the single line Arrangement however they would be okay with two lines so Fairchild revised the prototype to two rows of inline pins dual in-line packaging or dip introduced in 1965 the Simplicity of dual inline packaging cut the cost of assembly by a factor of four the industry widely adopted it throughout the 1970s and 80s during those 20 years dips which include ceramic and plastic versions held some 80 to 90 percent market share when measured by value however as the industry moved into the 1970s and the era of very large-scale integration or vlsi demands for i o density kept growing some vlsi chips would require as many as 300 leads more leads forced the dips to grow increasingly large dips can have 64 or even more leads but doing so gave them impractically large board footprints if Trends continued the way they were the dip packages would end up being far larger than the dyes themselves this invalidates the various miniaturization gains in semiconductor Manufacturing in response to this trend a series of new packages capable of accommodating far more leads emerged the packaging industry's second big revolution this generation of packages was defined not by their shape but rather how they were attached to the circuit board surface mounting technology describes a style of mounting packages onto the board using flat patches of solder already on the board surface mounting had several advantages over through-hole mounting first because through-hole mounting required you to solder the back side of the boards to secure the dips you can only use one side of the board with surface mounting you can use both this alone increases the theoretical number of packages on a single board by 35 to 60 percent second it allowed us to move the leads closer together or in other words for a smaller lead pitch this is because you no longer have the solder contact areas around the holes and third you can use cheaper boards drilling a hole into a board costs money and there can be up to a thousand holes on a standard board contemporary estimates found that a surface mount board costs 13 cents per square inch while an insertion hole mounting board costs 15 cents furthermore the boards aren't peppered with holes anymore which means they don't need so many layers to maintain their structural Integrity another cost saving measure previously all that surface mounting had to be done by hand which considering the smaller lead pitches required a great deal of skill and training this was the primary reason why surface mounting didn't take off at first new automatic machines finally closed the loop on this manufacturers now use convection heating hot gas or even infrared heat Rays to solder the packages onto the boards basically ovens the origins of modern surface mounting technology are murky and there isn't one significant inventor or Eureka moment I mean the concept of attaching stuff to a board is not exactly groundbreaking the earliest credible mention is a British Patent filed in 1960. it describes resistors coils and such attached to a printed board using an adhesive the connectors were connected using solder early adopters in the 1960s included the U.S military which used flat packs for their missile guidance computers the flat pack was a stackable rectangular glass and ceramic package that was surface mounted onto a board the flat pack was invented in 1962 by Yong Tao of Texas Instruments so actually a few years older than the venerable dip I couldn't find much more about inventor young Tao or his life which is unfortunate in the late 1960s the Swiss Watch industry adopted surface mounting has a way to reduce the number of electronics in their watches they popularize what is called the small outline integrated circuit sometimes also known as The Swiss outline the small outline looks like the dip and is made from the same molded plastic materials however it is far smaller a third is high and half as long this was because as 28 Gull Wing leads are spaced far closer together possible again because we are directly mounting these onto the board they are called Gull Wing leads because their shape is somewhat reminiscent of seagull's wings seagulls are birds that steal your hot dogs at the beach in the 1970s the Japanese electronics Industry began adopting surface mounting technology for their car radios tv tuners and TV cameras it is likely they got the idea from Europe Germany or Britain perhaps by the 1978 and 1980 period the semiconductor packaging industry had started moving towards surface mounting with numerous published articles discussing its use for increasing packing density in the early 1980s the Japanese revived the old U.S military flat pack to create an updated surface mount compatible version called the quad flat package or qfp with the quad flat we have the leaves projecting down and away from all four sides of the square package depending on their size the quad flat can offer anywhere from 20 to 240 leads pitches shrank to as small as 1 or 0.65 millimeters you can go guess how many inches that is the quad flat quickly evolved pushed Along by consumer demands for smaller and smaller consumer electronics the Japanese Industries introduced yet smaller packages like the shrink quad flat package the very small quad flat package and the thin quad flat package on the other end of the spectrum new structures outpace the quad flat on the lead count front people realize that having the leads come out of the sides meant that you couldn't use the real estate underneath the package itself so for high lead count devices the packaging industry revived an old IBM invention the pin grid array or the PGA first introduced in 1971 the square shaped pin grid array can handle hundreds of leads on its Underside IBM invented the pin grid array for high i o uses in the computer industry those packages were made from ceramic which not only made them more expensive but also their circuit boards since those boards had to get thicker to handle the added weight plastic variants were later introduced pin grid arrays were invented before the surface mount Revolution so a surface mount compatible cousin emerged in the 1980s the ball grid array with these solder balls are used rather than pins to connect the chip to the circuit board one big disadvantage of the ball grid was that you could not easily visually inspect the solder connections underneath the package X-ray and electrical tests are often used instead with badly soldered packages removed re-balled and reapplied solder ball technology appear in another packaging Innovation that popularized at about the same time as the BGA flip chip this is where the Silicon dye is flipped so that it faces downwards to build the interconnects we ditch wire bonding entirely and Connect using bumps and balls on the Chip's pads flip chip technology is still used today and offers several benefits first there is more contact with a heat sink which dissipates more heat second electrical signals have a shorter distance with flip chip interconnects than Bond wires starting in the 1990s consumers started buying smaller Electronics like mobile phones smaller devices mean smaller components chips and packages space became a premium in a chip package the industry measures this using what is called packaging efficiency the ratio of the area occupied by the active device the die in response to this the packaging industry developed the chip scale package which entered the market in the mid-1990s chip scale packaging is an evolution of the aforementioned ball grid array and refers to any package where the bear die occupies eighty percent or more of the total package area Taiwanese osat vendors like ASE group rose up on the back of such Ultra compact packages one prominent implementation of this concept is called wafer level packaging this is where we hook up all the dye interconnects before we cut those dies out of the wafer it's not only very cost effective but gives you very small packages as I mentioned earlier the Advent of surface mounting technology created a new generation of packages and techniques has Moore's Law slows down packaging technologies have seen yet another surge of investment creating what we can call Advanced packaging Solutions these new packaging Technologies now have a much more direct role to play in the system's overall performance semi-analysis has a fantastic multi-part breakdown on Advanced packaging that I think drops the mic on the subject perhaps the most well known of these are chiplets this is a variant of what are called multi-chip modules or hybrid circuits or system in packages I did a video about it previously most prominently AMD used them to create a disruptively great product one special area of the multi-chip world involves 2.5 D and 3D integration these are especially cool 2.5 D integration is where we put multiple dies side by side on top of an interconnect substrate called a silicon interposer this silicon interposer doesn't have any logic but is just made up of many embedded interconnects there are a few consumer products using 2.5 D integration today for instance amd's Radeon R9 Fury GPU first introduced in 2015. as a name implies 2.5 D is an intermediate step towards 3D packaging stacking and connecting multiple dies we are now able to use a whole new dimension to achieve packaging efficiencies of over 100 percent connecting these dies may require something more heavy than your standard wire bonds bringing forth New Concepts like the through silicon Vias or tsvs I am working on a future video on 3D integration and die stacking so keep an eye out for that if I ever finish it the semiconductor packaging industry is truly a chaotic one there are so many different technology trees growing concurrently with one another each branch developing and splitting for a certain significant need new technologies are built on top of those addressing particular Niche applications and then suddenly before you know it you have no idea why this new thing which you saw fail a long time ago is now such a big deal all over again in the semiconductor packaging World ideas are created and then vanish off the main line only to return to the Forefront when their time is right love it expect more deep dives into semiconductor packaging in the near future as we familiarize ourselves with this new world all right everyone that's it for tonight thanks for watching subscribe to the Channel Sign up for the newsletter and I'll see you guys next time

Channel: Asianometry

Views: 165,649

Keywords: asianometry

Id: nNpuiJitKwk

Length: 18min 31sec (1111 seconds)

Published: Sun Apr 02 2023