What is JTAG and why use it? (FULL Presentation)

hi this is Ryan Jones at karelis and today we're going to talk about what JTAG is and why we should use it the term JTAG covers quite a lot of territory but for the purposes of this presentation the focus is on the I Triple E 11 49.1 standard which defines the test accessport karelis is a company that utilizes the I Triple E 1140 a 9.1 standard to design and develop software applications as well as control hardware to test printed circuit boards of the items in this list our primary focus is on structural and functional board tests as well as in system programming using the JTAG interface in a nutshell the I Triple E 1140 9.1 standard defines a test access port and the internal structures on the device ICS to aid in circuit board tests the specification for the most part is transparent to users of JTAG tools and I'm just highlighting it here as a reference document this is what the chip manufacturers reference when putting this technology into their chips and the tool vendors use when developing applications that access this technology so why do we need JTAG several trends emerge with circuit board technology and IC packaging that started causing waves in the test world the primary trend was a loss of physical access with the emergence of fine pitched components and BGA type devices where the contact points were placed underneath the actual packaged PCB manufacturers also started developing newer design techniques and getting better technology to allow them to place components and traces closer together which started causing the trend of board density to increase leading many industries especially those in the consumer world to miniaturize their products these access issues caused underutilization problems on existing bed of nails type test equipment which requires an external test probe to physically contact a point on a board and these are expensive machines so their value really started to diminish to add to the physical access problems high-speed signals have also started becoming more widely used and putting an external test point on the high-speed net just makes it act like an antenna which prevents the design circuit from working correctly now ICT is an excellent technology for circuit board test however it does have some drawbacks especially in the upfront cost of the machines plus the costs associated with maintaining those machines not to mention the labor costs associated with the expertise required to use them it also requires expensive tests fixtures including the maintenance of those fixtures JTAG testing offers a similar test capability at a fraction of the cost and without the intrusiveness of external test probes now just to reiterate the growing problems that we discuss the major obstacle for bed of nails testing is loss of physical access the problem boils down to needing an external test probe to touch an electrical pad on the PCB and in many boards today that just isn't possible for a large number of nets the inability to place external probes on high-speed signals is also becoming a significant problem because adding a test point to a high-speed net has undesirable effects now even though JTAG has been around for 20 plus years the actual adoption rate of this technology has been pretty slow one organization i nemi which stands for the international electronics manufacturing initiative has made it their mission to forecasts and accelerate improvements in the electronics manufacturing industry for a sustainable future i nemi is made of a consortium of approximately 100 leading-edge electronics manufacturers suppliers associations government agencies and universities now one of their projects was to study the rate of JTAG adoption and this chart essentially shows the JTAG adoption rate by the silicon vendors but the data is given in terms of device pins that are jtech compliant so if you have a hundred pin device in 2013 you can expect roughly thirty five percent of those pins to have JTAG capability by 2015 this is expected to increase to 50 percent and within the next ten years JTAG capability is likely to exceed 70 percent of the device pins i nemi put this chart together which not only outlines the top five uses for geo tagging but also where JTAG is being deployed now if you ask an engineer if they use JTAG often you'll get an answer of oh they use that in manufacturing so there is a definite stereotype that JTAG is a technology that only applies to manufacturing in production and let's be clear the original intention of the I Triple E 11:49 that one standard was to address manufacturing issues but the reality is that's no longer the case and JTAG is finding new applications across a wide spectrum of disciplines one of the neat consequences of having a JTAG port on a board is that it's always there regardless of where the product is in its lifecycle so using JTAG techniques is applicable over the life of the product hardware engineers can use it to help debug prototypes software engineers can use it to gain confidence and the hardware allowing them to focus on software issues manufacturing and production can use it for acceptance testing and filled service engineers can use it for in system programming capabilities to perform firmware upgrades in the field now most business men look at tests as an expense that doesn't add any value to the product so why should we even care about testing well this chart explains why everybody wants a high quality product but achieving high quality without testing is quite difficult so why not just achieve a test coverage of 100% and be done with it well that poses its own set of problems because achieving the last few points of additional test coverage usually increases costs well beyond intended retail prices of a given product two little test coverage and we have a poor quality product that is likely to break resulting in warranty repairs field replacements poor product image and depending on your industry potential lawsuits so the key is to find the Goldilocks zone of just enough tests to maintain a high quality product without breaking the bank UBM tech puts out a yearly study on the embedded market and one graph that always catches my attention shows where an engineers spend the bulk of their time it's clear based on this chart that testing and debugging make up a significant portion of an engineer's project schedule so it's certainly helpful to make sure engineers have the right tools to ensure that their time is used efficiently which would certainly have a direct effect on the proving that time to market for any given project now I can't guarantee engineers will spend less time testing overall with our tools although that is a distinct possibility but I can guarantee that engineers will have an easier time testing resulting in fewer headaches by using Karelas products so hopefully this has given you a brief overview of what JTAG is where it's applicable and most importantly why you should be using it thank you for listening if you'd like to learn more about JTAG please visit the crawls website at wwlp.com

Channel: Corelis Jtag

Views: 68,839

Keywords: JTAG, Boundary Scan, Tutorial, boundary-scan, IEEE-1149.1, IEEE-1149.4, IEEE-1149.6, IEEE-1532, JTAG interface, JTAG tutorial, JTAG port, JTAG testing, flash programming, LabView, LabWindows, EJTAG, JTAG emulator, ScanExpress, ATPG, ISP, BIST, BSDL, PLD, DFT, emulators, USB, MIPS, ARM, powerpc, broadcom, arinc, SVF, embedded

Id: uQs32JjZrhs

Length: 7min 13sec (433 seconds)

Published: Thu Oct 03 2013