Vivado HLS Video Tutorial

okay my name is Steven tronic I am with Lane Allen and Alex one that shares last name is of is because why I don't know I will be going through a tutorial on how to use of Auto HLS to generate HDL code from C++ programming I'll be doing this through two example projects both of them will be different implementations of a calculator of a simplified function calculator design and we will get going starting with how to actually create a project from avato at the very very start screen thought it was pretty easy as with most things it has a messenger of inter screen and we will create the project name and we will store it up there in there and continue on this screen here is if you already have files that are that you're pulling in and importing you can add them or I guess you could create the files already I haven't done it this way so let's see what happens you file this screen is specifically to apply test benches to and you generally you should only need one test bench for any project I don't know why you need more but there's that this screen is set up to define solution names you can have multiple solutions to any given project you can set the clock frequency for whatever it is that you're working with and uncertainty that I'm not sure exactly what it does anyway a solution is essentially the process of simulation of C simulation C and HDL co-simulation and then the HDL that's generated from it we are not working with any particular we don't have any hardware to actually put this on today so whatever board doesn't matter for the sake but if you were to have hardware you're working with this would be where you select it so that you so that what your HDL works with the FPGA that you're working with when you finish you have a nice set of everything that you need and since we're starting from scratch we need to open them all this is a simple panel once you have everything open and created you don't really need anymore so for the sake of space since I have a huge screen I will close that as I said this is a simple simple calculator it will perform the functions of addition subtraction multiplication division and modulus on to twelve bit operands in order to accomplish that we will utilize three different words we will utilize a word or a variable called operation or operation type that defines which of those functions you're performing we will generate an operand one in an operand two which are what the functions will occur on and we will have an output so for the header file we'll need to do your basic basic header file stuff to create it and make it functional I've already created all this stuff before and to save time I'm just copying and pasting it from an open text file so that everyone watching those four hls projects you need to include HLS Stream H this is a library that allows you to create to easily create Phi those that HLS knows what to do with these photos are used for generally though they can be used for other things they're generally used for both input and output ports into the hardware design that you're creating we also include APN which is a library for C++ that allows you to create fixed point into fixed point values so you don't have to use the typical integer double float all that stuff you can define how many bits your variables will use which is very helpful when it comes to almost anything system based in the hardware and in order to actually utilize that you can either use ap underscore ends with brackets being what size when you define the variable name or you can actually do a type defined this is a function of C++ and probably don't need to explain it where you give the type you're creating a variable name that you can easily reference later next so one thing that I found while using HLS is the arguments to your top level function will be any and all system import inputs and system outputs and if you have multiple functions all of those inputs and outputs going to be moved throughout those functions so it's actually easier to create a struck that has all of these values in them so that it becomes easier and you'll have to type out like there's a project I'm working on it currently as 33 different values I have to move between all of my function calls so I struct is a much easier way to do this one thing that I found in my research is that the common commonly accepted practice is to use what's referred to as an ACCI word and that reference is data types of our axis which is used in a lot of the pragma stuff that i don't know a lot about yet so this word is going to represent in this case all of our inputs into the system so we have the operation that's being ducted whether it's additional application subtraction division Romanus and then we have the two operands that are being operated on oh and I forgot in this first function I'm actually doing 17 bit variables and then we will output to a 30 34 bit variable so that we can handle multiplication in case we need that many bit values and then since this is a typical C++ header file we also need our function prototype for our actual main file inside of this we will have this is what I was talking about with the stream the hls stream and data this will be all of our input ports this stream here will account for all of our our output ports all the data that were outputting outside of the system one thing to notice as you look over here in this panel here this will start showing all of the different variable types and all the random data structures that you have throughout your your project or I should say within the the file that you're working in so you can keep track of things and find it a little bit easier if you're looking for stuff question yeah go ahead so you you have your scope resolution operator into HLS where's Ichi let's define specifically to that in the stream there yes okay and then as with everything else in the next example that I'm walking through you can actually use the namespace so you don't have to use the scope resolution and all that just all the typical su possible stuff you open up that HLS stream done H I would have to find it notice we'll go back to that after I've gone through everything and look through there there are some interesting things that you can do with strings anyway so it's not a bad idea in terms of the header file itself this is all that we need for this simple of a project this is going to include other things obviously if you're doing a complicated program but this is all that we need for now so we'll move on to the CPP now this is going to be your main function and as such obviously we need to have our fun includes and our function definition this is HLS is the full arm compiler which is kind of nice because as you go through and you type stuff out if you miss mistype something you'll start getting it will actually I identify miss click miss clicks and and misspelled words and stuff so if you miss type simple calculator when you're trying to do a function call and it's easy to identify and a lot easier to find errors that way it's actually kind of nice inside of this what we need to do is to this is the best place yeah well we'll deal with this here so inside of this simple calculator function which this this right here inside of our main function is what the viola refers to is a top-level function this is what is going to be converted into HDL and put on to the FPGA fabric so anything that you actually need within your hardware system needs to be either in here or in function calls from this this function this top-level function here you can do function calls to two other functions and it will still be created so that's not a big deal actually I need to real quickly one thing you need to do for every project and I forgot about this is going to project settings under synthesis and you need to select which function you've created serves as your top level function is the one that will actually be generated into HDL and of course it's okay I haven't actually tried to generate the you need to save your files first oh oh you want to write your idea it has I'm actually ready that's why usually I don't actually try to build it until later and so there we go good call Alex okay so we've set it up and now it's it'll recognize your top local function so inside of this stream essentially when you create the testbench you're going to feed all of the the test data that you need to test all the functions of your program into this stream FIFO so what we need to do is we need to start reading in information from that FIFO to be able to utilize it in to to be able to read it into our hardware system be able to do things for it with it that is actually what this statement here does so we have our variable type and dot read is the function call for pulling information for popping information off of the FIFO dot right as we'll see here soon is the function for pushing stuff into the FIFO we are going to because it's a FIFO you can only read the data one time before that data is erased from the FIFO and it needs to be stored someplace so what we're going to do and this is the case with all of your reads you pretty much need to store them into some sort of a temporary holder that you can do stuff to the information after unless there are some really really weird situations where all you need to do is just read the information out one time you don't actually need to do any processing with it next thing we're going to do since this is a simple calculator and we have five different functions we're going to do a very very simple switch case to determine I'm going to try to do a simple switch case to determine which function on the calculator were are implementing so here we have our switch which is going to be the operation member of the word holder struct for 0 we will do addition and this is what I was referring to as the write function that actually what's this what this is going to do is this is going to take this function call here the addition function which will return the addition of the two of the two variables and it will write it to our output streams so that later on in the test bench we can output all the data that we we have generated and see if it matches with what our expectations are this is a simple case of zeros addition one is subtraction two is multiplication through this division Forest lodges and that is for this program all that we need for the calculator once I actually try and simulate this these will fix themselves and they will be unknowns right now they're unknowns because I haven't compiled and it doesn't recognize any of this stuff yet so let's actually go over and generate these functions real quickly here we just have our function prototypes nothing special and all of the functions themselves are ridiculously simple which is why I use this as a program so as I mentioned whenever we're doing stuff we pretty much need to send all of the input variables through all of our functions which is why having a struct that contains all of those is really convenient so for our addition function we're just going to we're going to return a fixed point of 34 and we're going to return the addition of the two operands that we fed into the system from our test bench which we will do here in a couple seconds and the same thing with the subtraction multiplication division of modulus that is very easy and very simple so now we'll move on to the test bench so the test bench in case you don't know or as with the test bench here even though it's written in C++ still functions as all the other test benches for every FPGA the purpose is to create your inputs and outputs in the test bench feed the inputs the data you need to check that your outputs generate what you need for the system to be working so we will just get our includes because those are important and here's where your int main is going to decide because it's actually your first the first function system even though it's not the main one that we actually need for our hardware here we're going to create at the very top this is going to as with everything else is going to create all of our input output and temporary variable variables that we need to to check the hardware system we're going to create our FIFO we're going to create our output data and we're going to create um the actual end data itself that we'll use later on in the system and as with other struck since this is a struct we're just assigning zeros to each of the member variables the next thing for this for a simple test bench like this is to generate the information that we want to feed into the FIFO so we need we have five functions of the calculator and we need to test all five of those for me to test all the addition the subtraction multiplication etcetera so to do that we are going to assign each member of the struts the data that we need to get an output that we desire so we're going to check addition full assign zero to the operation value and random easy to generate an easy to assess values for the sake of the the actual addition once all of these values are stored into the these struggles we then feed that struct into the FIFO that will be used inside of our simple calculator hardware to to process the data and the simple that's all it is then we'll go through subtraction multiplication division and modulus my technicality since all of these values are the same this struct exists like any other variable once you assign values those values will stay until you've reassigned the values so since all of these operands one operand 1 and 2's are the same I could just assign these one time but for the sake of a calculator these won't necessarily be the same all the time so I'd just reassign them every time these I could comment these out and it wouldn't change the culture the system however with the FIFO as soon as you read information that is on the top that information leaves and it isn't there anymore so you need to make sure you save it to a variable that you can do stuff with later now that we've in theory once this is run this will feed all five of these sets of input data into the system to be processed assuming that's happening now we have to do something actually with that data because we haven't actually called the hardware yet in order to do that HLS has a very convenient function call for its streams called empty which is just a simple boolean check to see if there is information in the file for or not in order to do this in order to run this as many times as we need to based off of however many input stream input values you have on the stream and do a simple while loop so while the FIFO is not empty we're going to call a simple calculator which is our hardware and we're going to send at the FIFO and the output data the output data streams this will initial in the hardware this will actually initiate all of the stuff that we've written out here and generate everything and it'll start the process by the end of this because of how we have it set up we will have a stream of our output data but we haven't actually done anything with it yet so whereas this one initiates all is initiates based off the inputs are going to do another while statement that initiates off of the outputs and it's the same thing while the output stream is not empty we are going to assign a temporary variable the value from that output a one weird thing that I haven't been able to figure out how to do yet with streams is to cascade commands off of them also be I'm sorry off of the read function the read or the write function itself so I haven't been able to figure out how to do outdated read and then shift this a certain number of bits or whatever this is kind of an isolated function that does one thing it's difficult to combine it with other things in one call and these reads these these fixed fixed integers are unsigned integers cannot be outputted output through the printf function if you include standard i/o you should be able to use C out I believe but I haven't done it so I don't know everything that's involved making it work and I'm not even positive that it does work so we're not going to do it when you use print s because that's what I've been using yes go ahead so these are data streams I'm assuming they're data streams in the traditional C++ sense does that mean that the photo libraries that we've included they overload the I guess the stream operators the double carrots no because oh I actually to be honest I don't know the HLS is restricts your ability to use to do system calls and dynamic memory and a few other things that you can't do with this for the sake of the seed we don't need those which is really convenient for the sake of a lot of heart sequential hardware things like what I'm doing at Sandia it's actually still very convenient I'm not certain if it over overloads those functions or if it just creates new functions for stream I haven't used the two of them together so I don't know how that interaction plays out it'd be worth worth playing with I'm not certain sorry no problem plus these streams are actually FIFO they well I guess I guess C out and all the other streams are a form of FIFO as well so it might override it anyway they were no conjecture aside if we were to oh and we also need our return zero I did not include any error checking I did not include any any of the more advanced things that you can and should do with C++ programs to make sure that inputs are valid and all that just because is a simple program and it's not really necessary a hls doesn't change how you do all those are all just logic comparisons and calls anyway so I didn't do any of that here so we're just simply going to return 0 at the end of the project this is all that we need as I mentioned here this is this printf here we just simply try to print out the fixed point integer is not the correct way to do so in Novato and we'll pull a an error so I'm going to save it and run it just to show you what that error is so in case you run across that you can remember it might be a little easier to remember this is one of my more common errors that I came up with initially this is the entire system you don't need anything else assuming of course that I'm not completely unlucky and Murphy's Law isn't working against me for the moment this should compile with this one err that I that I have in here so now you have the test bins created there are three more steps to giving us on the board the first step is to come up here into run C simulation this will run run through compile and and output into this console anything that you have in the printf so this is how you check to make sure that your code is doing what you what you think it should do the next step once you have a successful C simulation is to come over and run synthesis this synthesis process will take the C++ code generate HDL from it in either very log or VHDL define what you choose and the final step well actually I guess there are four steps the final the third step is to run the C plus the C++ and RTL simulation together so what this essentially does is it runs through the C simulation one more time records when all the outputs are then it runs through the HDL code excuse me for saying run to the HDL code records its outputs in comparison to make sure that they're the same if they are the same it will report a pass that the art that the RTL is working or not you should be good for exporting on to the FPGA which is the final step so we will run this real quick Lovato has an annoying pop-up that I don't like so I choose not to ever show it again and since you made me make my screen really big I can't get to the okay button and then we just work through this compiled here's another message dialogues to tell you if there is if the simulation is run without errors this dialogue should not pop up if there are errors it will let you know and we have our one error that the it cannot pass non-trivial II copyable types of fix points so in order to get around that the fixed point library has a convenient function which allows you to typecast the in the fixed point into a standard C++ variable in this case an unsigned double essentially this allows you to print print out and makes life easy and we should get appropriate outputs unless Murphy doesn't like me which he usually doesn't you would think with just copy and pasting you wouldn't be a little messed things up and you'd get stuff right so once you do the simulation privado generates a CSUN log which will show you all of the outputs that you generated with your printf statements it will Lhasa in the console generate the exact same information it's duplicate it's the same information there's no you can look at one or the other I have checked these before now and these are the correct values we do have a functioning populate ER we could feed it whatever values you want with whatever with whatever the five operations you want and get valid output from it one thing to note is that in this test bench these print deaths are not limited to the test bench so if I had and I did this quite a bit trying to get these codes to work if I had something go wrong inside of my CPP or one of my function files I could I could print and it should it should throw that if we get in here it should throw that into the the output this is the like with all like with all C++ code this is the common way of doing checks on your data make sure to figure out where problems are so how does the head of the printf statements translate into the HDL the princess I don't believe do they our system calls within HDL I don't believe that they actually follow through into the code because I mean the the hardware has no way unless you design design it as such and tie the printf to like an LCD screen or something they shouldn't have any way to actually print out a printf that's kind of what I thought yeah so that make sense all right cool do you guys have any other questions about this project that's that's all it is it's a very simple project just wanted to keep it basic and show you what what HLS is capable of and some of the tools that are useful for generating systems awesome you could blame yeah thank you good keep coming back lame abandoning me in the middle my presentation what I should have expected nothing less back all right momentary management okay well then I don't feel quite as bad okay now that do you have any questions about what I went through in here plane very clear ok very clear so glue look good the way I haven't used this particular style where we define a struct and use that struct in the stream in my mind this would be useful if you had um say a system that has a either a bunch of serialized inputs that you all have to that you have to meld all them together into a coherent word or if you are say using parallelization to transmit data and you have to combine all the individual ports into one word to be able to utilize the data that would seem to make sense to me so because of that the next way that I'm going to implement the same function is using a single bit stream to pull all the information in so essentially essentially this system assumes that you're just getting information and you kind of generate the words within the hardware itself next thing I want to do is kind of assumes that some exterior source generates the words and streams them in serially in my mind all of these are probably going to even though this is kind of a parallel operation in air quotes all of these are going to have to be streamed bit by bit to get into the system anyway just based off of hardware works so while the next the next example the same thing is going to put all of this information into one stream it is conceivable that each of these could be their own port that is each streams serially and then you would combine you would use what I'm about to show you on each of these individual parallel streams and then combine them later if that kind of makes sense so we're going to create actually for this one just going to open the project since I've already shown you how to create a new one you can only have one project open at time so yay crap which one did I simulate it yeah this one um as I said this is the exact same thing oh there we go this is the same thing as the last one we did just implement it in a different way okay for this one we're actually going to start with the test bench because you already know how the function operates so we're going to scroll through here and show you kind of try and show you how to generate a sequential an input stream one bit input stream this could be the same thing if for some reason you actually could manage to two stream 4 or 8 bits at a time but that doesn't seem practical to me and what I know of hardware so we're just going to do it this way typical function protocols for this one instead of using the AXI word has the structs what I decided to do was to define my own structs it actually word is just an arbitrary word that people use it doesn't no matter what it is and this will have the input stream this will have the output result it will also have a temporary value that we pull the data from the stream in and create a word out of and then it has our the stuff that we need actually to pass to to make the whole system work so we create it here we are going to actually send in these words as the words that we stream into the input FIFO these are the exact same values either using the previous one so addition subtraction multiplication division and modulus with the same 12 bit values a 5 5 5 so for the right stream we are essentially going to take the word that we created in this case we'll use the first one which is the addition of two values I'm going to use a for loop to rotate since we're taking a 28 bit word a 28 bit word and we are forcing it into a 1 bit stream however far you rotated over it's still going to truncate everything passed it so we're just going to do a very simple for loop that walks all the way through the word and sends it into the stream with the right command not very difficult kind of annoying to work through and get the logic right but be careful with how you do this I think this is we talked briefly when in one of our previous conversations about the concept of either big or little-endian data transmission based off of backwards or forwards and how it works I think this is somewhat the reason for why those two exists is how it decides to translate data whether it's forwards or backwards relative to how the information is coming in the system I don't know which one I'm doing I'm doing the one that makes sense where I start with the most significant bit and streaming in that way so this process here will pump sorry good snickering at your your comment just my way to the right way um what this will essentially do is create a 140 a a FIFO of a depth of 140 single bits which is 528 bit values so as before we have to do something with that so we are going to while this is there's information so I thought we're going to call the streaming calculator and then inside of this if we have a valid word because remember we only need five outputs not 140 so within this we have our valid word flag so that if we once we have pulled in 28 bits from the stream we will mark will flag that as a valid word we will process it and then we will output the result the advantage of doing it this way is if we have another system after this one this generates an output and we can functionally use the output without having to shove it into a stream FIFO at the end of it and it saves some of the fabric so if this were to link to another system it would send one value in the other system could immediately use it we don't have to actually set up a file at the end which I find to be very convenient and useful for a lot of different things beyond that our actual print statement in this case is simply the switch case so that I could check I was having issues with it working properly and getting all the information so I actually isolated exactly which function I was using and this is just a simple print there's nothing difficult with it inside of the header I mentioned actually already going over this I mentioned what we're sending and why and then we're going to CPP so in here we are going to have to reset the valid word flag every time it comes into here it's easiest to do this here rather than anywhere else so this is what's been done here we have our word generator this is going to take our input stream read in 28 values shove it into this value here of the input word which will be our temporary temporarily held word that we actually process information on and then we will continue on if we have a valid word then we will actually do the calculations from network so inside the word generator I had to do some trickery here with the project that I'm doing with Cynthia I can't remember how he did it but Willy actually typecast one of these this right here is a single bit word and this is a stream of a single bit word I can't remember how he typecasted it but he essentially allowed skipping this process of taking the single bit word and throwing it into a 28 bit word I don't remember how he did it I'll look it up and update this later but I have to do this a long way here this is going to take the value this input offset is simply showing which locations of the word you're getting you're going to move it over and create the overall word with this are there any questions hopefully I'm probably going way too deep because you guys have some program I have programming backward background so you should understand what's going on hopefully maybe yes you guys good okay and then because we have different flags and stuff we need logic to reset the slags so once we get to 0 we've gone through an entire 28 bit word so we need to take the word that we've slowly been generating off of each input bit and then assign it into our temporarily stored variable we need to set the valid word and then we set our counters if this is not a full word we decrease the opposite and we set the valid word false simple simple next we will go okay back here into the CPP so if we have a valid word we're actually going to take the information in it and we are going to do function on it now here we have a twenty eight bit word where the first four bits are the operation type the next twelve bits on the first stop is the first operand and then the final twelve bits is the second operand so we're going to have to find a way to extract that information and do things with it the nice thing is the un's inside of C++ have this really great function called range or you can explicitly pull out the exact bit values that you need which is amazing and makes life a lot easier than trying to do this manually this is essentially doing very log in C++ yeah pretty much yes that's exactly what this is without having to do the very log syntax which is the most important part I love syntax isn't that bad it's nice but yeah this is a really really good and in between and this like I said this is a lot of this is very contrived because it's a very simple on project that I'm trying to show what it's capable of some of the stuff you don't really isn't necessarily as explicit if you're doing a more complicated project it's not quite as clear yeah but it's easier to see at least for me because I'm used to C++ so a quick question yeah so everything when when we set up operation type and I have a feeling you're going to be getting this but I want to make sure I understand it that's what we're setting say pins in hardware range 28 or 24 to 28 in C++ that's imported over to vera log we can then access those pins how we want on the non C++ side um essentially what this will do is this will create a new this will use a series in this case of four flip-flops to create a new variable in the hardware yeah on the FPGA and these flip-flops we would like you said have the ability these will all be tied together they will be tied in order and we'll be able to do stuff with them as they are created as a 4-bit word I guess the question is how flexible is modular postman to this terms of looking we can we go into the the code and actually do isolated things with them correct we have to go back into the C++ and re-render or a recent Desai's or if there's an issue if there's an issue with how we implemented we could go back handle resynthesize we could if we wanted to go back and actually sort through the vera log and try to find it and fix it but it would probably be easier to do it through c++ because as i mentioned before unfortunately the code that is generated from HLS at least livadas version is not very clean and even from people who work with whose job it is and you have like master's degrees and working with that PGA's I'm working with mara log they have identified this process it creates code that is generally pretty much unusable when it comes to sorting through it on the human level and doing stuff with it you can but it's a lot harder it would most likely be easier just to do it through C++ to to clarify semantics not clean but very efficient and compact right it is a very efficient implementation of the FPGA fabric correct as I've talked to you about that Alex prior doesn't know essentially my the project that I'm doing at Sandia is to take an entire system that has been generated on one FPGA that is not radiation hardened for a satellite and then create a truncated version so that when that system fails because we're pretty sure it will we have a backup on a radiation hardness pga that we can still use to get usable data the problem is we didn't use that FPGA in the first place because the overall size of the fabric created from Simulink great the system was too large for the radiation hardened FPGA having done this and having probably 90% of the functionality created in hls of the overall system I'm using about 3.5% of the smaller radiation hardened FPGA versus a system from Simulink that you couldn't even fit on the FPGA in the first place though this is significantly more efficient than Simulink version with that being said that doesn't necessarily mean optimized what the seed is is going to be a much more optimized version so we might not be able to use it as cleanly because there's a lot of stuff but we really need to control the nitty-gritty of how the bits are being used with that being said though that much of the improvement has got to be more efficient at least to some degree if nothing else he's not going through as many gates so we'll see what happens when we start using this if we start using this and see where it goes but does that answer the questions that you guys had for the moment I there are a lot more like gate count and questions but as far as not interrupting the flow of your presentation and no question so far so good okay so just a quick recap we've isolated the components of the word that we need to function for this program so we essentially do I could have done another switch case here you can do if statements it doesn't matter this accomplishes the same task in this case I actually stored the result within this um within this struct unlike the last example so I don't need a separate output variable it's just another variable within the struct which is another way that is very common a lot of the AXI words include all input and output variables um and this just does our math operations and that's the entire entire system I believe we've been through each of these and I've explained the whole system now so when we run this we should wait dang it it is the run C simulation okay and apparently this dialogue doesn't remember different things between different projects which is annoying but just remember that dialog box pops up and here again we have the exact same values that we had before except this time we have identified what the operations is being performed but it still works just as well so if we do the run see synthesis which would be the next step in theory I never identify the function I thought I did that you did that in the last project well yeah but I imported this and I thought I'd done this before when I tested it all out but okay why not so hey look now you get to see how to do the setting top function again yay and I thought you needed the top function for simulation apparently you only need it for synthesis which kind of makes sense here this is not doing any simulation this is just generating the HDL code based off of BC code that we have up here and this should result in a report that identifies I think this report is what identifies how much of the various B FPGA fabric is being used so we look at this we have timings in terms of how long it takes to to generate we also have Layton sees a bunch of other fun stuff and down here which is kind of the more well one of the more useful things is a summary of each of the components the flip flops the look-up tables the RAM and the DSPs that are being used to actually accomplish this and as you can see we're using very very little which makes sense because it's a very very simple project next step would be our Co simulation so this is the C and RTL co-simulation this again apparently the fado really likes their stupid pop-ups which I can't get rid of so in here this is where you would select whether you were using Verilog or VHDL and you can set up different the types of things reduce to space optimization locations all the fun stupid things that we don't care about I will do very long this time just to see it and then we'll generate and see what we get here the sending the thigh this is going to the simulation to record what the results are and then once this goes through to if I remember correctly as with like even will simulate the first simulation takes the longest I think it kind of caches things and any future simulations I think go faster if I remember correctly so yes it is fairly convenient it's just that first one was really annoying and this tool is 50% faster than quarters - okay awesome wonderful this is a pretty simple project this is kind of sad I will take it the ho special if we can get this to work with the CD that would be awesome okay so it does specify C but this is the bottom hls ports over C and C++ yes that is correct and it unless on your you're actually creating a C++ file but it doesn't make any distinction in HLS of whether or not using C or C++ or does it recognize it doesn't recognize it it just generates okay cool uh so way up here where is it somewhere up here it's you actually saw the C outputs I saw it flash by briefly and then I lost it so did to the C simulation down here it produces the results from the very log simulation and it results with the pass because the the to match up and are the same so once we have that and we're satisfied with it the next step would be to come up here and export the X the RTL on to the board itself and then we would in theory have a functioning board if we had a functioning board we could work with and this is OOP that's the project [Music] as I said I I think this this example here the streamed example is going to be necessary every time even if you have parallel ports just because you have to be able to stream the information from the port and then construct the word anyway so I think a combination of this in addition to the other project where you have multiple ports for the word and the two operands would be a pretty good realistic expectation for what a real system would most likely look like and as I said before these are really really simple the only thing that I haven't covered in here is a concept called pragmas and Len and I were talking about this a little bit before you often Alex pragmas are an HLS construct that allows very fine control over the actual generation of the FPGA fabric so you can do things like you can kind of lockstep different functions that they occur at the same time you can control how long it takes to send information from the streams the system so you can make it sure it's always one clock cycle instead of say sending a value all the way through the system waiting for an output and then sending the next value despite these input files that I was telling you about that I was talking about these streams if you if you don't use pragmas these are essentially unlimited if I posed like here we have 140 bits I've used 4,000 it's going in 4,000 entries into a FIFO you can use the pragmas to restrict the depth of these five foes down to a particular amount so you can't overrun it and then it will start giving and then you have to start adding error error error correction not error correction but handling where if it overloads you need to be able to do something with information and that's going to be more what we have to deal with with our what's the 5,000 in the storage from each of our individual little processors and all that so there's a lot of stuff you can do I haven't had to use pragmas yet in my my Sandia project so I'm not exactly sure how they implement or the actual practical aspects of them I only know of them in theory so I can't speak on them too much but that's the only other real aspect of HLS that I haven't discussed so that I haven't gone over in these music so there are a bunch of more examples on pragmas on a certain document where's that located there are four document there are four files that I uploaded to the up to the server up to our Google Drive one of them is an HLS tutorial that is very basic has some stuff about pragmas have some stuff about the top-level function a lot of the stuff that I covered in here very good thing to read through and get a handle on very good basic information which one is that one titled that one is the vato HLS tutorial okay the second one is a system design PDF put out by Xilinx which essentially goes through and gives a bunch of examples for different types of systems you can create it includes state machines and C it includes various data parsing type of projects and it includes a fairly intricate complicated project of some sort of like an IP routing system that you can download all the files for the website I already downloaded those and stored those as a zip file inside of this inside of the vato HLS folder and then the fourth document does what their document the third file the fourth file are is a zip of these two projects that I created here today that you can download and play with and do stuff with if you want that you can load into to the botto and get working so awesome you guys have any particular questions if not I will probably in the recording here and then we can talk a little more if you have more complicated in-depth stuff that we're just going to talk about for the project one one added comments I was looking in the vato hls and under vato under help tutorials there is a very large document on extra material on how to do a lot of stuff like what you did today its 272 pages worth of tutorials synthesis introductions and how to do almost it seems like almost everything with HLS this seems like a really good documentation for just using HLS yeah I think I found this in my research before I started playing with it I work and come around doing this where I got a lot of my initial information from yep that's it home see this is also another good document do you have could you put that one up on the drive safe folder uh yeah we'll alter that eventually not do it quite yet but I will do that once we want I'm down here anything else that you guys have questions on for the sake of this walkthrough ah yes I think I have a question okay so I saw the checkbox for doing optimizing compilation when generating or emphasizing the HDL I also saw when importing all of the C files there were C flags that you could set for each file I guess what uh what standard c and c++ compiler flags are generally supported by this for example can you do linking time optimization or up different compiler optimization levels and or is that part of the optimization process that it does that's a very good question I don't have the answers for it because I haven't added to go through and use that so far and any anything that I've done with it I believe the compiler that this uses is GCC so I would imagine that any of the typical flags and stuff that you use that you are used to using any of those those projects and tools are available as with as with most compilers you you still have the ability to debug and set flags and stop points so I didn't go through and probably should I mention before but this this is essentially a full compile compiler and C++ ID you can do pretty much anything you want here as I said it's really fairly convenient if you were to change um this to say say you mistyped in to a UN 26 since you don't have this defined anywhere you're going it's going to show you that hey look we have an areas we don't like this you need to fix it so I mean it's it's actually even just programming and this is actually not bad and I've actually fairly enjoyed it it's it's pretty useful and a good tool to use ah you can do it you please get this done now I just didn't do it I'm just turned out telling you I didn't do it the are learning bugs that you noticed so far that would be good for us to know about or any hurdles that you've overcome with the bottom a very good question I haven't run across any I'm room across any bugs that have prevented me from doing anything that I've done granted everything that I've done so far has been pretty basic and minimal and like I said I have not yet been able to figure out how to take alternate CPP's so like for instance here to create a class the general cpp C++ good programming practices to create a separate CPP for the class and then header files for all the the various things that the class can do I think many will figure out how to add multiple CPP's to this like secondary CPP s and as I said I'm pretty sure that's just an issue with with how I have my include stuff I'm just going to work through it but other than that I haven't really noticed any particular bugs so anything that breaks the system and the biggest thing is just there are some times and I'm not sure what causes this if I'm working in the test bench and I have a whole bunch of prints here print file print statements here like all these and then I decide to for whatever reason come into here and check say the validity of this this F statement and I do a printf here this will occasionally I'm not sure why override print print statements from other files where it will only show this one or most show others it doesn't happen all the time and I'm not sure how I end up resetting it so I can see other things but that hat that does happen occasionally I've tried things like going in and just retyping a new prints file a print statement inside the file that I'm looking to actually get information from to kind of update that is the most current one to see if that fixes it and sometimes it does sometimes it doesn't that's just something you might have to play with him and kind of running enough times and it finally catches and sees all the other print statements if that makes sense it seems like it would be a compiler caching error that you have to just do a fresh compile it is potentially it is possible um and it eventually just sort of works itself out so it's probably just simply that where you run enough simulations where it does it flushes little cache and gives you the outputs that you need I think that's I think that's all it like I said it's actually been a decent joy to work with considering how much time I've spent inside of this program for the past like six weeks so with that I think I will at least end the recording here and then we can stick around and talk and see if there's anything else we need to discuss so thank you for your time and I will see you guys

Channel: Simplex Technologies

Views: 7,978

Rating: 4.8873239 out of 5

Keywords:

Id: 4b60yUsjoB0

Length: 57min 2sec (3422 seconds)

Published: Fri Jul 28 2017