In 2020, TSMC and Samsung will successively import EUV exposure machines from ASML in the Netherlands , which are necessary for advanced manufacturing processes. Intel, which was behind in the introduction of EUV , also announced that it will be the first to use the second- generation EUV exposure machines in 2025. In addition, due to pressure from the United States, China ’s The core can't successfully purchase the EUV exposure machine ordered as early as 2018. Why are all the major wafer process manufacturers rushing to purchase EUV? Will the lack of this machine really have a great impact on the advanced wafer manufacturing process? Today I will talk to you about the extreme ultraviolet exposure machine . Before understanding why TSMC can become the first to introduce EUV exposure machine , let’s talk about the lithography process. The five steps of the first step is to apply photoresist on the silicon wafer , which is similar to the photosensitive material of a film camera, which can make the light on it show up . Here, we have to mention that the current supply sources of photoresist are mainly Japan and the United States. In 2021, due to the 213 Northeast earthquake in Japan, some chip factories are in crisis of supply interruption . Therefore, even if TSMC and Samsung have mastered the world-leading chip process technology , they still have to rely on the supply of photoresist from Japan and the United States . Back to the chip. Photolithography process After coating the photoresist, it can be exposed . Put on the photomask . On the top of the photomask is the design diagram of the integrated circuit (one of the layers) previously designed by using EDA. It will form a circuit diagram image. It is worth noting that one of the reasons why TSMC is able to lead the process is because its mask cleaning technology is far ahead of other fabs. The reason why this technology is beneficial to the process is because even if there is a A particle smaller than the airborne particle PM2.5 falls on the wafer. For a nanoscale wafer , it is like a meteorite landing. Next is development . After exposure , the circuit pattern is removed according to the different properties of the positive and negative photoresists. Unnecessary parts , if you have played with a film camera , you will feel that exposure and development are familiar. In fact, the microlithography process , like the film camera , uses the principle of optical imaging. In a homogeneous medium , light will show the characteristic of going straight. By adjusting the distance between the lens and the negative, the large-scale images of the 101 building, the lion and the elephant are miniaturized on the negative , and the mask and wafer miniaturization ratio is 4:1 . The next step in the photolithography process is etching , where there is no photoresist layer after exposure Etch it down , and the place where the photoresist layer was originally left can block the etching, and then the circuit structure is formed . After the above steps, congratulations , you have carved a layer of patterned wafer . Please continue to work hard and repeat the operation for more than 50 times. It is true that a precise high-end wafer needs to be processed. To be able to operate smoothly requires several layers of process overlay (overlay) , so in the production, this step will be repeated nearly 50 times before the wafer will be truly completed . In the entire lithography process , the technology content is the highest, the most precise , and the most advanced technology is needed. It is exposure. Everyone knows that chips are constantly pursuing performance . Chips have evolved from 5 microns in the 1980s to 5 nanometers today . In this short period of 30 years, the area has shrunk by 1 million times. This challenge is to be traced on the wafer when the path of the circuit diagram becomes more and more complicated. The lines of these circuits also need to be thinner. We also mentioned in the video of the EDA Act that the length of the gate of the transistor is one of the factors affecting the size of the component . I am interested. learn more If you have more friends, you can watch our last video . In order to shorten the gate length of the transistor, it is actually to adjust the line width and pitch (Pitch) of the light on the wafer. This is like a schematic diagram of the screen . Usually, it is made of metal. The circumferential distance between layer lines and lines is used as a reference. The smaller the circumferential distance, the smaller the line width. The higher the degree of component miniaturization , how to pursue the minimum line width? Let us start with the core optical resolution formula where k1 is the coefficient of the process λ is the wavelength of the light source used in lithography. From the initial 436 nm to DUV 193 nm, and the latest EUV has dropped to 13.5 nm . sin θ is the angle of light gathering to the imaging surface , which is related to the lens group specifications , that is, the NA value of the lens Comparing the aperture with a camera , it is similar to a lens with a larger aperture, which can improve the resolution . We hope that the semi-peripheral distance will be smaller . The iterative improvement of the exposure machine is the most important thing . The wavelength of the light source and the NA of the lens. Numerical aperture , if the light source can be reduced The wavelength or the NA numerical aperture of the lens can effectively improve the optical resolution. The lithography process has always been refined in the direction of improving the exposure resolution , in order to make the line width on the wafer smaller and thinner. Well , the distance between the lines is as small as possible. One of the ways to improve it is to increase the focusing angle of the lens. The lens used in the exposure machine is much more complicated and huge than the cameras or telescopes we usually use. From the 1990s to 2005 Years After precise calculations, lenses of various thicknesses, large and small, are precisely stacked together . For example, this 20nm process node DUV exposure machine is a lens module composed of many lenses . It needs a crane to move it . Continue Miniature? According to the optical resolution formula mentioned above, in addition to increasing the numerical aperture (NA) , another direction is to change the wavelength and use a shorter wavelength light source , which can be greatly improved . This is the DUV deep ultraviolet light of the current wavelength of 193 nm light source to be improved to EUV. The reason for the extreme ultraviolet lithography process. EUV with a wavelength of only 13.5 nanometers can bring stronger energy to draw thinner lines. The problem is that EUV light cannot use traditional glass lenses. How can I say that because of the short wavelength of extreme ultraviolet light ? There is no effective material that can be used as a lens. In other words, the traditional glass lens used in the existing machine cannot be used. The lens must be replaced with a reflector . This combination of lenses is called a total reflection optical system. This total reflection system must be designed so that the beams avoid each other. And compared to the penetration of the lens , the angle of the specular reflection must be very, very precise. Any unevenness or skew on the mirror surface will cause a slight error , which will increase the difficulty of the design . At present, EUV exposure machines of this level can be made. There is only ASML in the Netherlands , so when ASML can produce EUV advanced machines, all fabs will rush to order . However, SMIC, which has not kept up with the rush to buy EUV exposure machines , said that it will use DUV exposure machines in 2021. The multiple exposure process has produced a 7-nanometer wafer , so the wafer process It seems that it is not necessary to use an EUV exposure machine, right? We have talked about many factors that affect the perimeter in the past , and the double multiple exposure needs to be overcome . When the line width and perimeter remain unchanged, repeat the exposure process more than once . For example, when the original process limit is 120 nanometers , it is also possible That is, when the closest distance between two identical components is 120 nanometers , a structure of 40 nanometers can be drawn through triple exposure , but the process will become complicated . The entire circuit diagram must be disassembled into three masks, and then each layer must be distributed. What is the pattern? This is like a slide . After the three pieces are stacked, a complete circuit diagram will be obtained , and it will not be limited by the limit of the circumference. In 2021, SMIC will use the DUV exposure machine and multiple exposure technology to complete the 7 nanometers. The Mi wafer process caused a commotion in the industry , but in fact, SMIC used the old technology to complete the 7-nanometer process, which is nothing new , because TSMC also used 193-nanometer immersion DUV multiple exposures to complete the 7-nanometer process in the early days , and it can maintain a certain level. Yield rate and stable mass production make everyone concerned that it took only 2 years for SMIC to skip the 10nm node from 14nm and jump directly to 7nm technology . This technology is climbing as fast as TSMC and Samsung. And major manufacturers such as Intel have different speculations about how SMIC mastered this advanced technology. It may be a technology export loophole in the United States , or it may be a technology leak from TSMC. What do you think? But in order to pursue the quality of the chip, each chip manufacturer The factory hopes that the process can be exposed and etched with a single exposure. Multiple exposures will increase the number of processes and increase the probability of wafer errors . The yield rate of the wafer will be difficult to control. The more processes there are, the longer the lead time of wafer production This in a disguised form increases the overall cost, and naturally it will not attract customers to place orders . After all, TSMC and Samsung have matured and can use single-exposure EUV technology to process 7nm chips. Customers will naturally flow to higher-quality fabs. Foundry In September of this year (2022) , Zyvex announced the latest lithography system ZyvexLitho1 to produce 0.7nm wafers. The wafers produced by this exposure machine are mainly used for quantum computers . Although the technology is far ahead of ASML’s EUV , the output It is very low and it is impossible to meet the demand for wafers on the market . That is to say, the status of EUV cannot be shaken for the time being. The EUV we introduced today is very important to the manufacturing process , but it is only a part of it. Key technologies require EDA from the United States to participate in the design and process of wafers , EUV exposure machines from the Netherlands , advanced process technologies from Taiwan and South Korea , and photoresists from Japan or the United States . In this situation where countries master key technologies, they need each other and need each other. Check and balance South Korea is trying to produce its own photoresist China is trying to produce self-sufficient EDA. What about Taiwan? Do you think Taiwan should focus on improving the process if it wants to maintain its current position? Technology , still have to try to develop your own EDA photoresist or other key technologies? Welcome to leave a message to discuss . Okay, the above is the content of this episode . In order to let the algorithm help you push it, please click like after reading it. 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