The Unreasonable Effectiveness of Atomic Layer Deposition

semiconductor manufacturing is heavily dependent on deposition techniques it is one of the key aspects of the semiconductor manufacturing gameplay Loop we add thin layers modify them maybe remove some of its parts and then do it all over again but as transistor sizes have shrank those thin layers have shranked too to the point where we now have to deposit these new layers atom by atom Atomic layer deposition as the name implies it is a special variant of chemical vapor deposition tuned for nanometer scale in this video we're going to look at this incredible nanotechnology but first I want to remind you about the newsletter I do try to keep it up to date with new things that I've been hearing the full write-up for videos you haven't seen before and so on the sign up link is in the video description below I try to put one out every week maybe two alright back to the show Atomic layer deposition has a well-documented history it is generally acknowledged I've been independently invented twice in the 1960s the Soviet Union produced a molecular layering technique this was based on a 1952 thesis by Professor Valentin Alex govski at the Leningrad Institute of Technology he worked together with another professor as I cultov throughout the 1960s and 1970s to develop this technique molecular layering is ald in all but name and it might have given the Soviet Union a strong advantage in semiconductor Manufacturing but many prominent Soviet scientists did not understand molecular layering furthermore they did not believe that it was even possible to create a structure with atomic precision when alaskovsky and kolzov attempted to patent the process in April 1971 the Soviet patent office remarkably rejected it the two and their colleagues continued their work in Academia but no Industrial Level activities were ever initiated yet another missed opportunity for the Soviet Union ald as we know it today was invented in Finland in 1973 Dr Tomo santola a professor in electrical engineering at the Helsinki University of Technology was contacted by Instrumentarium oi a medical instrument importer Dr santola was a rising star he received his Doctorate at 28 the youngest to do so in the electrical engineering department and he had already distinguished himself by inventing a thin polymer film humidity sensor for the company vaisala the humacap The Invention is still widely used today Instrumentarium wanted to develop their own technology products and invited santola to establish a research group to literally just find whatever such an open-ended goal was only possible based on suntola's prior success eventually santola and his team proposed two promising areas of study ion selective sensors and electroluminescent flat panel displays the latter are a type of flat panel display different from LEDs or oleds they're quite compact power efficient and deliver high contrast and brightness santola's presentation to instrumentariums management had been very abstract the CEO was literally like I am still confused but approved it anyway santola started work on the displays with a colleague working on the sensors many other people had before tackled the problem of fabricating flat panel displays at the time semiconductor manufacturers use one of two techniques for layering on these thin material films sputtering and thermal evaporation in the former we accelerate ions towards a Target material like a metal the impact ejects small particles of the metal which fly out towards the desired location where it accumulates as a thin film in the latter we heat up a material like a metal in a vacuum chamber to its evaporation point it vaporizes and travels over to the Target location where it accumulates as a thin film Dr suntola knew from his previous experience with thin films that these tools were not sufficient you did not have enough control over the thin films in early June 1974 santola was pondering over this while in his lab they had not moved in the equipment yet so it was mostly just tables and a periodic table up on the wall looking up on that table the idea came to him looking at the periodic table and thinking of the overall symmetry in nature to me came the idea of serving the complementary elements of a compound sequentially one at a time onto a surface this is the Crux of atomic layer deposition though back then they called it Atomic layer epitaxy like his big brother chemical vapor deposition Atomic layer deposition brings together various chemical precursors the big difference is in how we bring in the chemicals to the substrate rather than just throwing them all in there like an instant pot and letting them go to town we introduced the reactants one after the other through a set of pulse and Purge actions first we pulse a primary reactant onto the substrate some of this reactant gets chemically absorbed into said substrate then we purge the reactant by flushing an inner gas through the reactor chamber it cleans off any reactants that has not been absorbed into the substrate this is our first pulse Purge cycle now we do a second round of pulse Purge actions but with a different chemical this one will react with the first absorbed reactant to form just a portion of our deposited layer usually a single atom thick we repeatedly run this cycle until we achieve a layer of the appropriate thickness this is all done in a very controlled environment the temperature in particular is important high enough to facilitate the absorption of the first reactant into the substrate but not high enough to cause uncontrolled reactions so imagine it is kind of like pouring batter into a cake pan with cvd we dump all the contents into the pan that is spread out over the width of the pan via its own devices this method works and might work faster but at the same time the batter might be unevenly spread across the pan especially if the pan itself has some bumpiness of its own but if we were to slowly spoon in the batter into the pan meticulously flattening it out every time we do so then it is far more likely to get a clean evenly distributed layer the basic form of ald is to have these two alternating A and B steps but more advanced versions of the technique can have multiple steps the additional steps of this ABC ald cycle can be used to modify the temperature environment or the materials properties you can also have ald super Cycles with multiple ald Cycles to get a particular thin film after Dr suntola came up with the idea turning it into reality came relatively quickly the first experiments took place in August 1974 laying down a thin layer of the light emitting zinc sulfide it worked right off the bat though slower than expected and produced fantastic display layers electroluminescent displays need ald to produce dense layers without any small voids or bubbles called pinholes in the industry such things help the layers last longer in working conditions his team filed the first patent in November 1974 in Finland with the US Japan and the Soviet Union coming thereafter Instrumentarium realized that this was out of their wheelhouse and sold the project to the TV maker loha loja was able to bring more resources for development the technique was not unveiled to the public until 1980 shocking the audience with its quality at first ald's only practical applications were in display manufacturing ald was called Atomic layer epitaxy back then but the semiconductor industry makers struggled to accept it as an epitaxy epitaxy techniques are reserved for a single Crystal thin films like Silicon ald can certainly do this but a struggled to compete against existing epitaxy methods like molecular beam epitaxy people soon realize that the technique was better suited for depositing non-crystalline layers called amorphous layers amorphous layers of dielectrics or insulators for instance such a thing became ald's second major commercial application with the hard drive industry adopted it to deposit thin layers of aluminum oxide onto the read write heads of their disk drives considering the lack of interest in epitaxy a name change was in order the original first option Atomic layer chemical vapor deposition or alcvd didn't work out because of a copyright thus they decided to go with the name they have now Atomic layer deposition and that has worked out very well the IC makers grew interested in using ald to produce very thin films capable of uniformly covering substrates regardless of a shape or topography pioneering research in the 1990s eventually led to one of the first big semiconductor ald use cases producing the ultra thin High K dielectric layer in a planar transistor's gate in a planar transistor the gate keeps electrons from leaking through the gate from the source to the drain in 2007 Intel replaced the traditional silicon dioxide with havnium oxide the high K metal gate to better prevent electron leakage across said gate ald became the generally accepted way to deposit this layer that is because they have neum oxide gate layer is less than five nanometers thick so we need Atomic precision and also with other methods like sputtering Engineers worried about potentially damaging the Silicon substrate below the gate Intel's adoption of ald largely cleared the concerns that the semiconductor industry previously had about the technique making it an important part of the manufacturing portfolio even with 3D finfet Gates insulating gate oxides are deposited using ald and a memory ald is used to help deposit thin layers on the increasingly challenging topologies of modern memory structures modern dynamic Ram cells have a transistor and a capacitor the latter carries a charge which represents either a one or a zero but as those cells have scaled down in size the capacitor has gotten taller and skinnier some of the films in these capacitors necessary for the capacitor to hold its charge measure has thin as six to eight nanometers considering the thinness of the film and the skinniness of the capacitor ald works perfectly in 1998 Samsung announced that they would adopt ald for producing their 256 megabit Dynamic Ram products with their 180 nanometer process though it seems like this was not actually adopted until the one gigabit dram generation IC makers have also adopted ald into another significant portion of the semiconductor manufacturing process back end of the line processes or beol these complement the front end of the line or feol in front end you create the transistor structures in backend you connect those transistors together with metal interconnects in the late 1990s the semiconductor industry switched from aluminum interconnects to copper ones copper interconnects offer Superior electrical properties and reliability but also some tricky manufacturing challenges one of them is that copper atoms can easily diffuse into the Silicon degrading it so we need to First lay down a barrier layer made from dielectric typically made from tantalum or tantalum nitride for a long time we did this with sputtering or traditional cvd but as the interconnects shrank we eventually switched to ald to make our barrier layers thin enough though the old ways remained widely used until at least a seven nanometer generation due to concerns regarding impurities left over from the chemical reactions this is a good opportunity to discuss some of ald's downsides first as I mentioned it is a technique dependent on chemical reactions so you can only do ald if there exists a chemical reaction that you can take advantage of and as with any chemical reaction you have to worry about impurities this is due to the Practical problems of the ald method not all of the reactants absorbed into the surface of the substrate end up participating in the reaction good processes and tools can get the impurity rate down to a fraction of a percent but is it within the tolerated budget that is the main issue second traditional ald suffers from a slow rate of deposition for instance ald deposits the aforementioned aluminum oxide layers for a hard drive disk head and about 0.11 nanometers per cycle or 100 to 300 nanometers per hour low throughput is a serious concern for any semiconductor Fab but it isn't a deal breaker for a couple of reasons first if you are depositing layers just five nanometers thin then 100 nanometers an hour ain't a huge deal second you can batch these processes together I remember seeing one batch reactor applying an anti-tarnishing layer on 2 000 jewelry pieces at one time the one should note that it does take longer to pulse and Purge a larger chamber and third we have new spatial LD tools the concept has been around a while but this is where you separate the pulse and Purge steps by space rather than time one way to implement this concept is to have multiple Chambers each for handling one of the pulse and perch steps with the Wafers moving through them the Olympia tool from Applied Materials uses this concept with the Wafers on a drum rotating through various Chambers another big development is plasma assisted ald it uses plasma has the reactant in the second of the two pulse and Purge Cycles first encountered in the 1990s by members of Philips research Labs plasma assisted ald can produce better quality films and also work in relatively low temperatures this new technique also unlocked one of ald's largest markets multi-patterning I discussed self-aligned double patterning or sadp in a prior video you run a photo lithography step then you add oxide spacers silicon dioxide or some other oxide directly onto the lithography pattern then you do your etching and remove the spacers now you have lines twice as dense after just a single photolithography step self-aligned quadruple patterning is sadp done twice plasma assisted ald was ideal for this because you had to be able to deposit a uniformly thin layer that closely hugged the patterns turns and corners and since it worked at low temperatures below 100 degrees Celsius it posed less deformation risk for the thin layers Intel first introduced sadp into the 22 nanometer nodes due to euv being unavailable at the time the memory makers followed on at the 30 to 35 nanometer node levels even now that UV is working multi-pattening isn't going anywhere IMAX three nanometer node still makes extensive use of 193i lithography with saqp due to euv's costs and inherent challenges this is good for Bitcoin I mean plasma assisted ald Leading Edge semiconductors are getting both smaller and taller for instance the major foundries are moving to using gate all-around transistors which are made up of stacked Nano sheets totally surrounded by the Silicon gate on the front end of the line these structures have complex topologies the challenges of building and coding these is an opportunity for ald to take share from traditional deposition processes like PVD and cvd on the back end of the line we have new interconnect structures like through silicon Vias or tsvs basically channels connecting different levels of 3D integrated chips ald already plays a big role in 2D copper interconnects and will continue that when they go to 3D the work started by Dr suntola's team in the 1970s continues to mature and spread throughout the industry over 50 years later with Leading Edge semiconductors we're moving around individual molecules and atoms now ald is one of the few tools capable of letting us do it all right everyone that's it for tonight thanks for watching subscribe to the Channel Sign up for the newsletter and I'll see you guys next time

Channel: Asianometry

Views: 133,468

Keywords: asianometry

Id: 3UUq5cPH4Uw

Length: 16min 52sec (1012 seconds)

Published: Thu Aug 31 2023