Fetch-Decode-Execute Cycle

this assembly language instruction means increment register a that means taking whatever is in a and making it one bigger this here is the machine code representation of the assembly language instruction and this is what we have to get into the computer's memory in order for this instruction to perform its task of course when we deal in machine code we usually represent binary patterns by hexadecimal so 3c is in fact the hexadecimal equivalent of this binary pattern here so it is reasonable to say that Inc a is represented in machine code by 3c but in full knowledge that 3c is an easy way for humans to remember binary patterns this is a simplified schematic diagram of a microprocessor system and we're going to be using this to describe the fetch decode execute cycle for the machine code instruction responsible for incrementing the contents of register a we have already seen that the hexadecimal number 3 C represents the instruction that will be responsible for incrementing the contents of register a there has to be put in memory now for argument's sake I'm going to say that this particular code is going to be placed in this memory location here which has the address a e 0 0 now for a microprocessor system to work it needs to know the address of the first instruction is going to execute in any program so this address here AE 0 0 will have to be placed in the program counter which is this register here so the program counter will have placed within it the address a e 0 0 we're going to have to make an assumption about something being in register so for this demonstration we're going to say that register a has within it 0 0 so on the schematic diagram we can now say that we have the instruction 3 C in this location which has this address a e 0 0 and we can say that the address a e 0 0 has been placed here in the program counter we confer the see that we have made the assumption that red a has stored within it zero zero and the hate is just there to remind us that we're dealing with hexadecimal the binary pattern in the program counter is transferred to the memory address register the program counter is then incremented by water automatically incremented the program counter is an essential part of the operation of a micro processing unit it ensures that the next memory location is pointed to now this may have the next instruction or it may have the operand that needs to be dealt with the contents of the memory address register is transferred onto the address bus and the control unit sends out two low pulses on the control lines now I've paused the video at this point so we can look very carefully at what this actually means well the a e00 is the binary pattern responsible for selecting the memory location a e00 in which the opcode 3c is stored these two low pulses well they have individual effects the low pulse on the cs line is responsible for switching the chip on the low pulse on the read/write line is responsible for ensuring that the location selected is read from the result is that this particular location is selected and the 3c is going to be read so it's taken via the data bus to the buffer register and a copy is then sent to the instruction register when the opcode is in the instruction register we regard this as the end of the fetch that's the end of the fetch part of the fetch decode execute cycle we then enter the decode stage of the fetch decode execute cycle and this is where the electronics works out what 3c actually means fed by information from the decoder the control unit now takes over it transfers the 0 0 to the arithmetic and logic unit and asks it to add 1 to it the 1 is then transferred via internal data bus and is placed in register a and that's the execute part of the fetch decode execute cycle and that shows the complete fetch decode execute cycle for the machine code instruction increment register a

Channel: John Philip Jones

Views: 172,984

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Keywords: Fetch-Decode-Execute cycle, machine code, Increment register A, INC A, Micoprocessors, Machine code programming, Instruction Cycle

Id: XM4lGflQFvA

Length: 4min 53sec (293 seconds)

Published: Mon Apr 08 2013