ARM7 Introduction | Bharat Acharya Education

hello people Amber Alert area welcome to a new video so in today's video we will learn an introduction you're gonna give any production to arm7 processor in Bombay Abood University we learn arm 7v VMI that's the version in whichever university you are and maybe the version changes but as long as it's arm 7 most of these points still to me the same the family of the processor is the same now um is microcontroller it's a 32-bit microcontrollers that's the first thing I want you to know 32-bit musi now if you learn it co v 1 and then you've come to UM like what most people do this is a big jump from me for you first of all congratulations you're learning a processor which is of the modern world 85-86 8051 they are like 40 year old processors but everybody needs to learn to get an idea and then you launch themselves into higher processors so how is a processor of this generation and being 32-bit it is four times as powerful as H 0 Phi 1 which is just an 8-bit processor what it simply means is H 0 500 to 8-bit operations in one cycle I'm a dude 32-bit four times that in one cycle to do the same thing 80 50 I'm gonna be required four cycles so just by this virtue at a Spore times faster plus there are many many many more things one by one I'm gonna tell you now I'll give you a brief idea about all these features right now and then each one of them I'll be making a separate video for this all these videos will be posted on my own website it's called www.laurainthekitchen.com the link is given down below all you need to do is register in that website like you do any method just play with your email or mobile number whatever and then if you wanna watch all these videos you've got to subscribe to the channel um okay then the channel by the name arm you were subscriber that the subscription rate I've kept is very low it's $4.99 fire red rubies and that's it for 6 months you can watch all the videos which already there plus all the videos which I keep putting on a daily basis as many times as you want to I'm sure you won't need it for 6 months I hope you want anyway Alistair so it's a little bit next it has a 32-bit améo these two properties go hand-in-hand obviously you'll see you'll have a little bit ALU that means again it can do 32 bit or 32 bit subtract in one site it has a 32 bit data mess what does that mean it can transfer 32-bit data in one cycle now here there is one point to understand if you've learnt 8 0 8 6 you know you pick up this point you still do now let's start with 8 0 8 6 there is the reason I'm doing that is 0 8 6 4 the 16-bit processor it had a 16-bit data bus to transfer 16-bit data in one cycle now 16-bit data is stored in two locations two consecutive locations to read them at a time they cannot be in one chip because from one chip you can read one location anything so we split it any six addresses into two beggars called even Bank an odd Bank it's very similar to your book in your book you have phase number one then you turn around pin number 2 3 then go on 4 5 6 7 I look at this set of ID's these are 2 4 6 8 so these are even addresses 1 3 5 7 these are ordered dresses so this is your even bank and odd Bank that one enough printing on both sizes you can read both sides together so it makes your reading faster but does that mean you can read any two pages together no you can read 2 3 god 4 5 6 7 which means as long as it starts from an even address you can read two pages together now 7 and back side is 8 they are which are two conjugative pages but they cannot be read in one cycle because they are one behind the other okay such data is called misalign data so just want you to understand there's something called aligned and misaligned data aligned data means in 1886 you want to be the 16-bit number it should start from an even address 0 1 is aligned to 3 is a like 1 2 is misaligned now exactly the same principle arm is a 32-bit processor it wants to transfer 32-bit data a 32-bit data will be stored in four locations four consecutive locations to read them from one chip they should be in four so treat them in one cycle they should be in four separate chips so these are all Foreman pants okay this is how it looks like one ship will have location Co the other ship will have one then do density these port can be read and write four five six seven can be read at then eight nine maybe can be read and so on now one two three four a-rod's so four locations but as you can see they are misaligned these are your first location this is the second location misaligned data requires two cycles cannot be read at a time similarly two three four five seven three four five six the next align set comes at four four five six seven can be read at nine eight nine eighty can be read anything now normal processors like 8086 support both align data and misaligned data because that is flexibility storing the way you want to but in terms of performance align requires one cycle misaligned requires two cycles um is a performance based processor okay the first few characteristics of arm will make you understand there is a complete paradigm shift here flexibility is not what we want we don't mind a rigid system but a system that gives you mind-blowing performance that's what Tom does um does not allow misaligned leda everything in um has to be stored in an online form so if you want to transfer 32-bit data or store 32-bit data it should start either from location 0 or from negation 4 or from a or from C which means a location which is a multiple of 4 now any address which is a multiple of four has something very peculiar about it zero is zero zero zero so you have this written the number in binary for s 0 1 0 0 8 is 1 0 0 0 C is 1 1 0 0 what you notice is the last two bits of address the LSB of the address will always be 0 any number which is a multiple of 4 it's LSB it last two bits will always be 0 now this is the point you don't have study of banking in um ok nobody studies banking in all processes once you learned in a deity since you know what banking yes but this point will keep coming back again again whenever you talk about an address this point will come back then the last two bits of the address are always do Co now instead of being lost every time just wanted you to put their foot in understand it once that is so that the address is a multiple of four so that the data is stored in an aligned form so that you can do the operation in one cycle so instantly understand um is not here to please everybody um is not a flexible process its rigid but if you've been my students you know this I keep saying this in all the processes I teach there's always a choice between rigidity and buffer performance flexibility and performance as you make systems more flexible performance takes a hit the more rigid you make the system the faster the system gets so arm is more towards performance it's a performance oriented processor that's why everybody finishes learning microcontrollers with um this make the cream of the whole thing yes it will have a lot of rigidity but will give you tremendous performance so here's the thing I wanted you to know is the 32-bit data bus it wants 32-bit data array line there will be four bands in the memory and every data will be aligned so will be stored at the location which is a multiple of four so the last two bits of the address will always be zero see that's what I want you to know now let's go ahead again look at the next point characteristic of iris process the first of all pam has a full form way some people think it's a moon I'm stands for advanced RISC machines say again advanced RISC machine risk itself has a full form risk stands for reduced instruction set computers most of the processors that you would have studied so far will be sis processors I'll be doing a whole video after this on comparison between risk and sis there will completely two different schools of thought in making processors sis processors are most flexibility oriented RISC processors are more performance oriented so our mother to raise processor there are a lot of characteristics of a risk Assessor practices the most outstanding characteristic if you want if you alright distinguish I can give you 20 points if you want me to tell you in one line to single-handedly the biggest feature of a risk processor is all instructions that are authorized in all instructions are of same size how many bits 32 bits instructions are fetched from the memory through the day thomas dana bus is 32 bits if every instruction is also 32 bits this guarantees that every we fetch exactly in one cycle so again high performance anyway these points become more and more clear as you learn how many people I was with people have a love-hate relationship with them those who understand it they love it those who don't understand it hated and they always try to avoid it in their subject somehow or the other let's not do one and somehow try to pass understand it you didn't you not learn microcontrollers to learn only 8:05 one or eighty eight five eight zero eight six those were made your process like learning ABCD but not making words you learn all that so that you will understand big processes so this is the whole idea behind alerting to this subject ok so anyways so it is a 32-bit microcontroller it has 32-bit data bus it has 32-bit instructions every instruction will be fetched in one cycle all instructions again are stored in the line form I will not repeat this point again again everything in are misaligned next it has a 32-bit address bus don't get confused that was great our scheduled addresses coincidentally is the same size but they have nothing to do with each other so the address bus has 30 rubles not from the size of the address bus you can figure out size of the memory if address buses is any bit the memories 2 days 2 n what's the idea if a Christmas is 1 bit it will give you 2 addresses 0 & 1 which to believe you for address is 0 0 0 1 1 0 1 1 if it's three but will give you eight addresses now get the drift if it's an N bit address bus you can get to rational in locations please let me do understand so being a 32-bit address bus it allows you to access to raise to 30 you do raise to 32 is 2 raise to 2 multiplied by 2 days to 32 raise to 2 is 4 to renew maybe break it down so much 2 raise to 2 is 4 2 raise to 30 is a Giga that means 44 GB is the size of memory that can be accessed by arm are you here in totality it can access whole gigabytes of memory now the next point is related is based on one human model so there are two models again on which the memory is managed the processors are made one is one human one human is the person who came up with the whole idea of processor so it's probably the father of the subject you could say it like that one human will he is the brains which made all of this possible today we enjoy the fruits of their effort anyway so there is another school of thought hammered processes which are based or by a ritual which was led by Howard Institute anyway so one human model says then there is only one memory in which all programs will also be stored and all data will be on system Howard model says there are separate memories for program and data 8051 if you learn ad fifty on it's based on Howard model it has 64 KB program limit 64 KB data memory in the Nam there is one memory of 4gb it contains both programs as well as data a common memory so one human model means there is a common memory for storing programs and details so in this poor CV there are programs also there are data also some systems have more programs less data some systems are less programs more data that changes from model to model depending on where you're losing it but you have a total space of course DB spend it the way you want and those very simple points now we go a little higher it has a three stage pipeline I am sure you heard of pipelining now if you see in a two stage pipeline you would have seen like a teeny six pipelining means dividing the process of an instruction into independent sections and overlapping them a three stage pipeline means see I'm sure you know this everything struction is stored in a memory the first thing you do is fetch an instruction then decode it to understand what the operation is and then execute it to perform the operation so this is our normal processor works fetch decode execute fetch decode execute fetch decode execute how does arm work fetch decode execute execute execute execute execute execute then we need you understand this now no problem first if you fetch one instruction while it is decoding that it will fetch the next while it is executing the first it will report the second and fetch the third so what will happen by the time the first instruction has been executed the second is already recorded and it's just ready to be executed by the right ii will be executed third as people in ready to be executed so it is working on three instruction in data type at one time at one is being executed to the next one is being decoded in the next one is being fetched so once the first instruction finished off will finish in the whole process fetch decode execute thereafter all you need to do is go on executing instructions all the time that was being wasted in fetching and decoding instruction has been don't really because of the three stage by politeness now this is not cutting edge this is this good cutting edge is twenty state pipeline Pentium 4 netburst architecture that is cutting edge but anyways this is better than a new stage my plate so how gives you a three-stage babbling but whenever this you pipeline you and I will be doing the video of it you'll understand a three-stage pipeline in a RISC processor gives you higher performance than a six seven or probably even a ten stage pipeline in assist processor in a sis processor because of the flexibilities biplane is a big hit it gets effective RISC processors because of their rigid nature when they say 3/4 sleeves pipeline they actually mean a three-stage pipe and it gives you Wow performance can assist processor six stage biplane gives you poor performance then it's three stage pipeline because of its flexibility you'll understand these points when I make the video pipeline you buy anyway since we say pipeline I hope you understood what the meaning of three stage pipeline excuse me nice another characteristic feature of a RISC processor RISC processors are heavily based on registers sis processors on the other hand work most of the times on mimic sis processors give you very few registers like if you use if you heard it if you study eight zero eight six it has only four general purpose registers ax BX CX DX even if you use them as a d 8-bit registers what what are you watching it registers a Elliott VLDL it's nothing arm has look at that number look at that number thirty-seven registers and my newly on 32-bit registers that has not a surprise it's other readable processor so obviously they'll be 32-bit registers but there are 37 registers out of which 16 are available at a time okay all 27 or not together 16 available at a time by the name is r02 r15 then you may wonder what happens to the other register they are called banked registers if you learn 8:05 huh there are 32 registers 8 are available at a time and then you can switch the banks not the same thing but on a similar grounds when the mood changes I'll be teaching you all that when the more sales some of the registers remain the same some of the registers become different so that's how in totality there are 37 registers so it's 16 available at any given point of time by the names are 0-2 r15 we'd be doing a whole video on register model I will show you how 16 at the time totally becomes because of the 7 odd story becomes 37 that's called programmers model of a very important question whichever university you are it you in all probably probability you will be getting this result so waiting for this any perks on the lodestone 1 what does that mean you wanna add you want to subtract you want to do anything get the data into a register do not work on memory get this clear these few minutes will make you understand properly 80 85 or 86 or 8051 allow edit Medical Asik operations with registers also and memory also you can write add CL come up here you can write ahead serial comma square bracket 2004 86 8051 add a comma r0 had a comma at the rate R 0 please tell me you know the difference between the two if you learned it's your father anyway so most processors but that you learned so far assists processes processes allow operations with registers also operations with memory also so here is flexibility as I said suspect similarly waste this process has saved no such functions all operations will be done only on registers you want to work on some data of the memory first load it into a register then do what you want to do on the register store the result back in the memory the only operation allowed on memory will be a load and store nothing else good instruction set of harm in the college stocks we said the only instructions that work on memory are load and store everything else we've added subtracted multiplied beat anything else and or X or whatever they will be done only on registers not on memory on things you would say this is so Reggie get this here it's this rigidness that gives such good performance in spite of being only a three stage pipeline as I said it be it beats a 675 blindnesses processor in terms of performance because of such a rigid architecture error has made it very successful all modern mobile phones use ARM processors I don't need to say anything more all of them ok they use ARM processors so that gives you an idea how powerful these processes are any so it works on load store mode it's all yours come out of me with memory this is the process of this little memory inside the processor there are registers with memory you can only do a load and a store get that into a register store the result back into the memory or enigmatic logic operation all processing will be done inside the processor only on resistance that's winger loadstone order it has 7 operating modes yes I'll just list them supervisor use a system fi q ir q undefined abort I have given them in a logical order when you switch on you are in supervisor mode you get in you user mode start working on the time 99% of time you spend in user mode to make a system call you go to system mode you get a normal ending up you do I argue more fast in trouble fi q mode there are two error modes all about an undefined I will be teaching you all those modes and I'm processor when it is working from the time it is powered on in the time you switch it off it can be in one of these seven modes is that way I'm just giving you the names of questions giving you an introduction I'll be doing a whole video on these modes that's one of the biggest features of the next following point is totally related there are seven interrupts also called exceptions exceptions make enter a different mode there are seven modes there are seven interrupts but don't think the seven interrupts make you at the seven modes seven interrupts make you enter five modes user mode and system mode don't need an interrupt to enter when I teach you wrong just telling you right now there are seven in terms like there are seven modes there are seven in terms in are also called exceptions so you've got reset undefined prefetch APOD data about software in ir q and fi q i have just given the names there are seven interest again I'll be doing a whole video on this topic as well what the videos will be very related these two topics go hand-in-hand two sides of the same image to be honest now or same point next it has seven addressing modes image register direct register indirect register relative base index base width scaled index there are seven different addressing modes what do you embarrassing modes the manner in which an operand is given an instruction when you learn d7 every single shall be of course making a video for it first time - - will seize it anything What nonsense is this what's the point of having so many options as you learn them and you understand each one is better than the other as you learn up to the last one as you reach like wow what is this how could people come up with such intelligent ideas so they all have a reason never look at a subject and thing you're learning things for no reason of course there are the even the open or even lift a spoon and saw this underneath and discovered it we have invented this all of this is created by us engineers so if they are created by educated people who supposedly are also fairly smart obviously each of them have a good use behind them if you want to match up to their IQ learn you understand they use behind these things then you understand how smartly they've been created and what's the advantage and the more you understand them in the better and is near you get tomorrow you wanna create your own things so that time you should also you create anything - smart as these are probably even better so there are seven addressing modes in a hum and lastly there are three formats data format supported enough I said arm is a 32-bit processor so it works on 32-bit numbers but every number doesn't have to be 32-bit numbers can be smaller so I'm both from 8-bit 16-bit and 32-bit numbers 8 bit numbers are called white 16-bit is called half word and it is called word now students esse everybody calls it bit a bite that I agree 8-bit is called a bite school teachers also teach you that same school you notice in some X books sixteen bits is called a word in some textbooks 32 bit is called a world so stewards say what is it why is it so contradictory no it's not contradictory but understand the language the word by is universal fight always means it which no matter what process are you learning the word world doesn't have a standard size words size is the size of the processor chip you're learning are being a 32-bit processor the word size is 30 units if you learning 8086 being a 16-bit processor the word sizes 16 bits that's why you had an instruction called cbw in 8086 converted a bite to a word that converts an 8-bit number to a 16-bit number so students follow up what they say so Lysander in 1886 you told us Ward is 16 but now you're saying what is 32 bit because 1886 was the 16-bit processors so word size with 16 bits in 8051 I'm sure you know the rest of all PSW program status word 8051 is an 8-bit processor that registers an 8 bit register so over there even were size was 8 bits here it's a 32 processor so word size is 32 bits so once again tell me the three operand sizes 8 bit is called a byte 16 bit is called a word 32 bit is for 16 bit is called a half word 32 bit is called a word okay so it supports all the three kinds of operands and there are many more features have this listener for you it's a fire map question these are more than enough to write I think that well that you know would it supports thumb state that's why arm 70 DMI the reason why I've not put it over here is because maybe you're not learning TDM and maybe you're learning some of the version anyway so EDM I suppose some state that T comes for that it's supposed to long supports long multiplies so that M comes for that Andy and I are because of the debugging the software in the hardware debugging that it supports anyways that we link that later you can like read many more features this was just an introduction salient features just your entry point now a few things which I want you I want you to pick up from here is it's a 32 bit processor which works on 32-bit numbers 16 and 8 also supported most important it is virtually everything has to be aligned okay no non misaligned nonsense supported over here the only operations from allowed on memory are load and store everything else will happen on a register it's a three stage pipeline it has seven operating mode seven interrupts seven interesting modes though there's points that but the main point was that the 32-bit processor and works on 32-bit numbers in a line form everything is in anomalies alive so every operation requires only one cycle okay it's a three stage pipeline fetch decode execute all three stages supports one human model which means is one common memory code containing what programs and data okay now will be a learning with more of mom in the upcoming videos will be shooting non-stop day and night so hopefully these videos should be up second on all of our shoot be up to the span of two days that's what I'm trying to you [Applause]

Channel: Bharat Acharya Education

Views: 164,605

Keywords: 8086, bharat acharya, microprocessors, processors, mup, bharat sir, 8085, ARM7, ARM, ARM7TDMI, RISC, CISC

Id: fI20Bsx3EPM

Length: 25min 3sec (1503 seconds)

Published: Sat Nov 25 2017