#60: Basics of Phase Locked Loop Circuits and Frequency Synthesis
Video Statistics and Information
Channel: w2aew
Views: 181,949
Rating: 4.9752321 out of 5
Keywords: W2AEW, Tek, Tektronix, AFG, AFG3000, AFG3252, scope, oscilloscope, 2467, trace, traces, probe, 10x, phase, locked, lock, loop, PLL, synthesizer, frequency, detector, comparator, filter, VCO, PFD, voltage, controlled, oscillator, divider, flip, flop, tutorial, demonstration, counter, 4046, CD4046B, MC14046B
Id: SS7z8WsXPMk
Channel Id: undefined
Length: 22min 12sec (1332 seconds)
Published: Fri Aug 31 2012
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Oh hey PLLs
his demo is on digital PLLs but just in case someone is messing with analog PLLs: (some of the points apply to both cases)
the amplitude of the phase detector input signals must be similar, idealy the same. Otherwise, performance is subpar.
for a phase detector in general in an analog PLL, there is no need for a loop filter. It's a phase detector, it doesn't output harmonics, just the difference of the phase of the input signals. If the phase detector is implemented using a frequency mixer, then for the "phase detector" to become a phase detector, not just a signal multiplier ("frequency mixer"), a filter is needed.
loop filter order is crucial. Significant phase delay inserted by the loop filter deteriorates PLL performance. offsetting the vco phase output accordingly may compensate.
when he says monotonic he meant to say "monotonically increasing".
in an all-digital pll, you may do without a loop filter completely, if the vco may accept a pwm signal
i welcome any and all responses
Excellent!
good video. felt like a proper, planned lesson and not just some guy futzing around in his lab.
I want that nixie tube freq counter!
Excellent video.
Just as I was googling PLL fundamentals. Thanks!
I really enjoy your videos. They are great.
I have a really basic and simple question. I feel I run up against this a lot when thinking about circuits. I just don't understand why certain things are necessary.
In this case for instance, why would I want to generate a new phase locked signal? Can't I just work directly with the original signal? :s
For type 1 detectors, since the polarity of the phase difference seems to be lost, how does the VCO determine whether the frequency needs to be adjusted up or down? All I could think of is that the phase of the pulses relative to the VCO's output is used?
I just want to commend you on making so many great videos. Thanks!
Dude, you're a boss. Now I finally have an understanding for how this works.